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9173B - Block Diagram
9173B - Pinout


Video Genlock PLL

The 9173B provide the analog PLL circuit blocks to implement a frequency multiplier. Because the device is configured to use an external divider in the PLL clock feedback path, a large divider can be used to result in a large frequency multiplication ratio. This is useful when using a low frequency input clock to generate a high frequency output clock. The 9173B contains a phase detector, charge pump, loop filter, and voltage-controlled oscillator (VCO). The 674-01 can be used as the external feedback divider. A common application of the 9173B is the implementation of a video genlock circuit. Because of this, the 9173B inputs operate on the negative-going clock edge. The 9173B is pin and function compatible to the AV9173-01/15.


  • Phase-detector/VCO circuit block
  • Ideal for genlock system
  • Reference clock range 12 kHz to 1 MHz for full output clock range
  • Output clock range of 1.25 to 75 MHz (-01), and 0.625 to 37.5 MHz (-15). See “Allowable Input Frequency to Output Frequency” table for conditions
  • On-chip loop filter
  • Single 5 V power supply
  • Low power CMOS technology
  • 8-pin SOIC package

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Voltage (V)
2LVCMOS0.625000 - 37.500000, 1.250000 - 75.0000000.012000 - 1.0000001LVCMOS255

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
9173B-01CS08LFActiveDCG8SOIC8CYesTubeCheck Availability
9173B-01CS08LFTActiveDCG8SOIC8CYesReelCheck Availability
9173B-15CS08LFActiveDCG8SOIC8CYesTubeCheck Availability
9173B-15CS08LFTActiveDCG8SOIC8CYesReelCheck Availability


Technical Documentation

Title Type Format File Size Datesort icon
Datasheets & Errata
9173B Datasheet Datasheet PDF 204 KB Jan 29, 2013