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VersaClockproducts allow designers to save board space and cost by replacing crystals, oscillators and buffers with a single timing device. Exceptional versatility and configurability allow for maximum freedom in the design process. There are four internal PLLs, each individually programmable, allowing for up to seven unique frequencies. These frequencies are generated from a single reference clock, which can come from one of two redundant clock inputs. A glitchless automatic or manual switchover function allows the redundant clock to be selected during normal operation.

VersaClock III Software optimizes configurations and provides:
  • Automatic analysis and adjustment of spread spectrum, loop bandwidths and outputs
  • Clock-to-pin locking and multi-register configuration
  • Bit-level manipulation
  • Direct software interface with VersaClock III evaluation board
  • Free software downloads at www.IDT.com/go/versaclock3
Features
    Four internal PLLs
Optional integrated VCXO
    Internal non-volatile EEPROM
Each PLL has a 7-bit reference divider and a 12-bit feedback divider
    Fast (400 kHz) mode I2C serial interface for device configuration
8-bit output divider clocks
    Output frequency range: 4.9 kHz to 500 MHz
Programmable loop bandwidth settings
    Input clock frequency range: 1 MHz to 200 MHz
 -40 to +85C industrial temperature operation
    Reference crystal input with programmable linear load capacitance
           Crystal frequency range: 8 to 50 MHz
I/O Standards:
      Outputs:  1.8/2.5/3.3 V LVTTL / LVCMOS (device dependent)
      Outputs:  LVPECL, LVDS and HCSL
      Inputs:     LVTTL / LVCMOS

    Two PLLs support spread spectrum generation

 Redundant clock input with glitch-less auto switchover

VersaClock III Product Selection Table

XO

Package

Output No.

Output Type

VDDO *

5V49EE901 TSSOP28
QFN32 (5 x 5 mm)
9
9
LVTTL, LVPECL, LVDS, HCSL
LVTTL, LVPECL, LVDS, HCSL
No
No

5V49EE902

QFN32 (5 x 5 mm)

9

LVTTL, LVPECL, LVDS, HCSL

Yes - 4

5V49EE903 TSSOP28
QFN32 (5 x 5 mm)
9
9
LVTTL
LVTTL
No
No

5V49EE904

QFN32 (5 x 5 mm)

9

LVTTL

Yes - 4

5V49EE701

QFN28 (4 x 4 mm)

7

LVTTL, LVPECL, LVDS, HCSL

No

5V49EE702

QFN28 (4 x 4 mm)

7

LVTTL, LVPECL, LVDS, HCSL

Yes - 3

5V49EE703

QFN28 (4 x 4 mm)

7

LVTTL

No

5V49EE704

QFN28 (4 x 4 mm)

7

LVTTL

Yes - 3

5V49EE501

QFN24 (4 x 4 mm)

5

LVTTL, LVPECL, LVDS, HCSL

No

5V49EE502

QFN24 (4 x 4 mm)

5

LVTTL, LVPECL, LVDS, HCSL

Yes - 2

5V49EE503

QFN24 (4 x 4 mm)

5

LVTTL

No

5V49EE504

QFN24 (4 x 4 mm)

5

LVTTL

Yes - 2
 

VCXO

Package

Output No.

Output Type

VDDO *

5V19EE901

TSSOP28
QFN32 (5 x 5 mm)

9
9

LVTTL, LVPECL, LVDS, HCSL
LVTTL, LVPECL, LVDS, HCSL

No
No

5V19EE902

QFN28 (4 x 4 mm)

9

LVTTL, LVPECL, LVDS, HCSL

Yes - 4

5V19EE903

TSSOP28
QFN32 (5 x 5 mm)

9
9

LVTTL
LVTTL

No
No

5V19EE904

QFN28 (4 x 4 mm)

9

LVTTL

Yes - 4

5V19EE603

QFN28 (4 x 4 mm)

6

LVTTL

No

5V19EE604

QFN28 (4 x 4 mm)

6

LVTTL

Yes - 3

5V19EE403

QFN24 (4 x 4 mm)

4

LVTTL

No

5V19EE404

QFN24 (4 x 4 mm)

4

LVTTL

Yes - 2
* VDDO capability allows 1.8 - 3.3V output operation
 
Software Requirements
This software calculates solutions for the VersaClock™ III family of programmable clocks. The configuration code generated by this software may be programmed through the I2C device port, enabling users to try out a variety of solutions with minimal turnaround time.
The VersaClock III devices do not need or have a programmer like the one used for the earlier parts. The parts may be programmed on the board through the I2C port in production.
Supported Platforms:  400 MHz Pentium II or later running Windows Vista, XP, 2000 and NT 4.0
Installation requires Microsoft Installer (MSI) Version 2.0. This is included with Windows Vista, XP and Windows 2000 SP3.
 
Software Downloads and Documentation

Current Software Version:  3.24

There are two distinct software downloads available: the application and the desktop database for local operation. The Desktop Database .ZIP file (below) is an optional download - and ideal for anyone who may not be connected to the internet, or is blocked by a proxy/firewall. The database should be installed after the application has been installed on the machine. The VersaClock III User Manual explains the different modes on page 7 (PDF link below):

  Download the software here (for Web)   .ZIP file, 9.1 MB   (Oct.20, 2009)
  Download the desktop database here  (Desktop)   .ZIP file,  923 KB   (Oct.20, 2009)
  Download the VersaClock III User Manual   PDF, 3.1 MB,   (Oct.20, 2009)

Additional VersaClock Product Information and Links 
VersaClock III News Release June 30, 2009
IDT VersaClock III product flyer
Evaluation Board Schematics for VersaClock III  (PDF, Oct. 2009)
Evaluation Board Setup Guide for VersdaClock III (PDF, Oct. 2009)

All IDT VersaClock products:  www.IDT.com/go/versaclock 

For VersaClock Help and Support, send email to:  cmd-marketing@idt.com 

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