Integrated DDR3 Register Enables Higher Memory Speeds, Better Performance and Extended Voltage Range While Lowering Power Consumption by at Least 25 Percent vs. Competing Devices
SAN JOSE, Calif., June 8, 2010 –
Integrated Device Technology, Inc. (IDT
), a leading provider of essential mixed signal semiconductor solutions that enrich the digital media experience, today extended its leadership in the memory interface market by announcing a next-generation integrated register and phase-locked loop (PLL
) for DDR3
registered dual in-line memory modules (RDIMMs). Designed for the next generation of power-conscious, high-performance servers and workstations, the new IDT DDR3 PLL
/register device is the world’s first to support data rates from DDR3
-800 to DDR3
-2133 at voltage levels including 1.5V, 1.35V and 1.25V, all with a power envelope that is unmatched in the industry.
The IDT SSTE32882K is the latest introduction in a series of memory interface devices architected with a low-power core and IO designs that have become the hallmark of IDT in the enterprise computing space.This architecture delivers active and idle power savings of 25 percent or more vs. competing devices at the same voltage node. In a data center or server cluster, that translates into simplified planning, a smaller carbon footprint and potentially thousands of dollars in OPEX savings. In addition, the device supports voltage nodes of 1.5V, 1.35V and 1.25V to further reduce the overall power consumption of the entire memory subsystem.
“The performance and economics of virtualization and client-based computing demand large memory footprints. To meet these requirements without exploding IT budgets, IDT is continually striving to minimize the power envelope that operators have to contend with in large data centers,” said Mario Montana, vice president and general manager for the IDT Enterprise Computing Division. “Our new DDR3 devices with the IDT PowerSmart™ technology empower our customers to deliver green memory solutions that do not compromise on performance or quality.”
In keeping with the IDT objective to support industry standards and interoperability, the IDT SSTE32882K is designed to be fully compatible with the most current JEDEC specification. The device sets new industry benchmarks for critical requirements, such as jitter, propagation delay (tPD) and dynamic clock offset and drift (tDYNOFF), using an architecture that delivers consistent performance across the entire range of frequency, voltage and temperature.
Pricing and Availability
The IDT SSTE32882K
is currently sampling to qualified customers. It is offered at $5.00 for 10,000 unit quantities and is available in a 176 BGA
package. For additional information, visit www.IDT.com/go/DDR3
With the goal of continuously improving the digital media experience, IDT
integrates its fundamental semiconductor heritage with essential innovation, developing and delivering low-power, mixed signal solutions that help customers overcome their system challenges. Headquartered in San Jose, Calif., IDT
has design, manufacturing and sales facilities throughout the world. IDT
stock is traded on the NASDAQ
Global Select Stock Market® under the symbol “IDTI
.” Additional information about IDT
is accessible at www.IDT.com
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IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners.