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IDT Extends Timing Leadership with Introduction of New Series of PCI Express Timing Solutions

Broadest Portfolio of High-Performance, Low-Power PCI Express® Gen1 and Gen2 Timing Devices Optimized for Demanding Applications in Server, Storage, Communications and Consumer Markets
SAN JOSE, Calif., November 3, 2008 – IDT® (Integrated Device Technology, Inc.; NASDAQ: IDTI), a leading provider of essential mixed signal semiconductor solutions that enrich the digital media experience, extends its position as a timing leader with the introduction of PCI Express® (PCIe®) timing solutions, including fan-out buffers, zero-delay buffers, clocks and jitter attenuators — all PCIe specification 1.0 (Gen1) and/or 2.0 (Gen2) compliant. Designed for demanding applications in server, storage, communications and consumer markets, the IDT PCIe devices include all timing-based products needed to design and manufacture top-of-the-line PCIe-based products, including network switches and hubs, machine vision systems, and communication control applications—anything requiring ultra-high-speed serial data transfers.
 
IDT PCIe fan-out buffers isolate the main system clock by buffering and providing multiple copies of the main clock signal. All buffers have PCIe specification-compliant differential host clock signal level (HCSL) outputs. The IDT fan-out buffer portfolio spans devices from 4 to 21 outputs. IDT buffers are available in commercial and industrial temperature ranges for systems operating in harsh, factory floor environments.
 
IDT zero delay buffers integrate Phase-Locked Loops (PLLs) that regenerate the input clock signal with multiple outputs to drive several loads. The delay through the device can be adjusted, which allows precise control of the timing of the clock signals to the loads providing a synchronous copy of the input clock. Precise clock edge placement is particularly important when driving random logic to prevent race conditions – where clock and data edges are so close together that the logic gates can’t distinguish the correct logic state. The zero delay buffer portfolio includes devices with up to 12 outputs and these parts are available in commercial and industrial temperature ranges.
 
IDT clocks provide the “heartbeat” or reference clock for the integrated PCIe ports of FPGAs and embedded microprocessors. All these devices are available with integrated oscillators that use low-cost crystals at 14.318MHz or 25MHz. These devices can also accept a single-ended reference-clock input and convert it to a PCIe differential output with jitter specifications conforming to Gen 1 (86 picoseconds [ps] peak to peak) or Gen 2 (3.1 ps root mean square phase jitter) at the standard PCIe frequency of 100MHz. Some of the devices can also output other common PCIe frequencies, including 125MHz and 250MHz, which are sometimes used in PCIe physical layer interface implementations. These devices also include spread spectrum capability, which adds EMI reducing frequency modulation to the basic functionality of the clock synthesizers.
 
IDT jitter attenuators integrate PLLs to reconstruct PCIe clocks, reducing inherent jitter or noise. In some PCIe systems, the PCIe clocks are generated from a relatively high phase noise PLL frequency synthesizer. In these systems, a jitter attenuator device can be used to reduce high frequency random and deterministic jitter components from the clock synthesizer and the system board. The PLL loop bandwidth of the jitter attenuator is set relatively low (500KHz to 1MHz) allowing the device to pass spread spectrum modulation while still reducing jitter. The IDT jitter attenuator portfolio has 2 to 6 outputs and is available in commercial and industrial temperature ranges.
 
Pricing and Availability
The above devices are all available for sampling to qualified customers. For a full list of all IDT PCIe timing products, including packaging and pricing information, visit www.IDT.com/go/PCIe-Clocks.
 
About IDT Timing Solutions
IDT is a leading provider of timing solutions for PC motherboards, communication, storage, industrial and digital consumer applications. The IDT portfolio of silicon timing devices offers differentiated solution elements, such as programmable platform, precision technology, advanced I/O and stratum-compliant synchronization. Specific families include devices for clock generation, programmable skew, zero delay and non-Phase Locked Loop (PLL)-based clock fanout. For additional information on IDT timing solutions, visit www.IDT.com/go/PCIe-Clocks.
 
About IDT
With the goal of continuously improving the digital media experience, IDT integrates its fundamental semiconductor heritage with essential innovation, developing and delivering low-power, mixed signal solutions that solve customer problems. Headquartered in San Jose, Calif., IDT has design, manufacturing and sales facilities throughout the world. IDT stock is traded on the NASDAQ Global Select Stock Market® under the symbol “IDTI.” Additional information about IDT is available at www.IDT.com.
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IDT and the IDT logo are trademarks or registered trademarks of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners.