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MK2308-2 - Block Diagram


Zero Delay, Low Skew Buffer

The MK2308-2 is a low jitter, low skew, high performance Phase-Lock Loop (PLL) based zero delay buffer for high speed applications. Based on IDT's proprietary low jitter PLL techniques, the device provides eight low skew outputs at speeds up to 133.3 MHz at 3.3 V. The MK2308-2 includes a bank of four outputs running at 1/2X. In the zero delay mode, the rising edge of the input clock is aligned with the rising edges of all eight outputs. Compared to competitive CMOS devices, the MK2308-2 has the lowest jitter.


  • Packaged in 16-pin SOIC
  • Pb (lead) free package
  • Zero input-output delay
  • Four 1X outputs plus four 1/2X outputs
  • Output to output skew is less than 250 ps
  • Output clocks up to 133.3 MHz at 3.3 V
  • Ability to generate 2X the input
  • Full CMOS outputs with 18 mA output drive capability at TTL levels at 3.3 V
  • Spread SmartTM technology works with spread spectrum clock generators
  • Advanced, low power, sub micron CMOS process
  • Operating voltage of 3.3 V

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Voltage (V)
8LVCMOS20.000000 - 133.30000020.000000 - 133.3000001LVCMOS23.33.3

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
MK2308S-2ILFNot Recommended
DCG16SOIC16IYesTubeCheck Availability
MK2308S-2ILFTNot Recommended
DCG16SOIC16IYesReelCheck Availability
MK2308S-2LFNot Recommended
DCG16SOIC16CYesTubeCheck Availability


Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
MK2308-2 Datasheet Datasheet PDF 185 KB Jun 28, 2012
Apps Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-845 Termination - LVCMOS Application Note PDF 62 KB May 13, 2014
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
show all (9)
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 6, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Apr 14, 2016
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Feb 15, 2016
PCN# : A1208-01R1 Gold to Copper Wire Product Change Notice PDF 254 KB Dec 21, 2012
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016