T1/J1/E1 Analog Front End (AFE)

Analog portion of Line Interface Units (LIUs) that support the 2.048M bits/second and 1.544M bits/second rates known as E1, T1 and J1. An AFE may be used where clock and data recovery (CDR) is provided in another device containing only digital logic such as a field programmable gate array (FPGA).