Skip to main content
82P33813 - Block Diagram
82P33813 - Pin Assignment

82P33813

Synchronization Management Unit (SMU) for IEEE 1588 and Synchronous Ethernet

The 82P33813 Synchronization Management Unit (SMU) provides tools to manage timing references, clock sources and timing paths for IEEE 1588 / Precision Time Protocol (PTP) and Synchronous Ethernet (SyncE) based clocks. The device supports up to three independent timing paths that control: PTP clock synthesis; SyncE clock generation; and general purpose frequency translation. The device supports physical layer timing with Digital PLLs (DPLLs) and it supports packet based timing with Digitally Controlled Oscillators (DCOs). Input-to- input, input-to-output and output-tooutput phase skew can all be precisely managed. The device outputs low-jitter clocks that can directly synchronize lower-rate Ethernet interfaces; as well as CPRI/OBSAI, SONET/SDH and PDH interfaces and IEEE 1588 Time Stamp Units (TSUs).

Features

  • SMU allows any IEEE 1588 software, running on an external processor, to control the generation of electical clocks, and to access and control physical layer synchronization
  • Supports Telecom Boundary Clock (T-BC) and Telecom Time Slave Clock (T-TSC) applications per G.8273.2 with physical layer frequency support to the DCOs
  • Physical layer clocks comply with ITU-T G.8262 for Synchronous Ethernet Equipment Clock (EEC), and G.813 for Synchronous Equipment Clock (SEC), and Telcordia GR-253-CORE for Stratum 3 and SONET Minimum Clock (SMC)
  • System-wide precise 1PPS (Pulse Per Second) edge alignment is supported with programmable input-to-input, input-to-output and output-to-output phase delays: sub-ns resolution
  • 24 hour time holdover is supported by DCOs with fine frequency resolution (1.7e-16);Generates clocks for: Ethernet, SONET/SDH and PDH interfaces: jitter generation <1 ps RMS (12 kHz to 20 MHz)
  • IEEE 1588 grand master applications are supported by locking to 1 PPS (Pulse Per Second) references from GPS or other GNSS sources
  • Eases local oscillator sourcing by supporting any of eight common TCXO/OCXO frequencies for the System Clock: 10 MHz, 12.8 MHz, 13 MHz, 19.44 MHz, 20 MHz, 24.576 MHz, 25 MHz or 30.72 MHz
  • Automatically loads configuration from an external EPROM after reset without processor intervention
  • 72 pin QFN package

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeCore Voltage (V)Phase Jitter Typ RMS (ps)App Jitter Compliance
9LVPECL, LVDS, LVCMOS0.000001 - 650.0000000.000001 - 650.0000006LVPECL, LVDS, LVCMOS1.80.560

Product Options

Orderable Part IDPart StatusPkg. CodeTemp. GradePb (Lead) FreeCarrier TypeSample & Buy
82P33813NLGActiveNLG72P2CYesTrayCheck Availability
82P33813NLG8ActiveNLG72P2CYesReelCheck Availability

Documents

Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
no-lock
82P33813 Short Form Datasheet Short Form Datasheet PDF 266 KB Apr 4, 2016
locked
82P33813 Final Data Sheet Datasheet PDF 1.06 MB Apr 4, 2016
Apps Notes & White Papers
locked
AN-946 Using a 19.2MHz System Clock with 82P337xx/8xx/9xx Application Note PDF 165 KB Aug 23, 2016
no-lock
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
no-lock
AN-901 How to Implement Master/Slave for SETS and SMU Devices on Timing Redundancy Designs Application Note PDF 475 KB Jul 5, 2016
show all (21)
locked
AN-807 Recommended Crystal Oscillators for NetSynchro WAN PLL Application Note PDF 78 KB Apr 29, 2016
locked
AN-927 Reducing Power Dissipation 82P33813 Application Note PDF 209 KB Apr 4, 2016
no-lock
ITU-T Profiles for IEEE 1588 White Paper PDF 1.17 MB Oct 23, 2015
locked
AN-888 Register Map Documentation for IDT82P338xxx and 9xxx Devices Application Note PDF 668 KB Jul 1, 2015
no-lock
AN-846 Termination - LVDS Application Note PDF 50 KB May 13, 2014
no-lock
AN-845 Termination - LVCMOS Application Note PDF 62 KB May 13, 2014
no-lock
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
no-lock
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
no-lock
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
no-lock
AN-839 RMS Phase Jitter Application Note PDF 149 KB May 7, 2014
no-lock
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 32 KB May 7, 2014
no-lock
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB May 6, 2014
no-lock
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB May 6, 2014
no-lock
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
no-lock
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
no-lock
AN-801 Crystal-High Drive Level Application Note PDF 109 KB Jan 15, 2014
no-lock
AN-806 Power Supply Noise Rejection Application Note PDF 353 KB Jan 15, 2014
no-lock
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
Other
no-lock
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
no-lock
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016
no-lock
Timing Fabric for Next Generation Communications Equipment Overview 简体中文 Overview PDF 474 KB Mar 1, 2016
show all (4)
no-lock
Timing Fabric for Communications Equipment Overview Overview PDF 263 KB Dec 10, 2015

Software & Tools

Title Type Format File Size Datesort icon
locked
82P33x14 Timing Commander Personality Software TCP 2.94 MB May 13, 2015
no-lock
Timing Commander Installer v1.7.3.3 Software ZIP 17.87 MB May 12, 2016