2:4 PCIe GEN1/2/3 Clock Multiplexer

The 5V41067A is a 2:4 differential clock mux for PCI Express applications. It has very low additive jitter making it suitable for use in PCIe Gen2 and Gen3 systems. The 5V41067A selects between 1 of 2 differential HCSL inputs to fanout to 4 differential HCSL output pairs. The outputs can also be terminated to LVDS.

Features

  • 4 – 0.7V current mode differential HCSL output pairs
  • Low additive jitter
  • suitable for use in PCIe Gen2 and Gen3 systems
  • 20-pin TSSOP package
  • small board footprint
  • Outputs can be terminated to LVDS
  • can drive a wider variety of devices
  • OE control pin
  • greater system power management
  • Industrial temperature range available
  • supports demanding embedded applications
  • Additive cycle-to-cycle jitter <5 ps
  • Additive phase jitter (PCIe Gen2/3) <0.2ps
  • Operating frequency up to 200MHz

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
5V41067APGG Active PGG20 TSSOP 20 C Yes Tube Availability
5V41067APGG8 Active PGG20 TSSOP 20 C Yes Reel Availability
5V41067APGGI Active PGG20 TSSOP 20 I Yes Tube Availability
5V41067APGGI8 Active PGG20 TSSOP 20 I Yes Reel Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
5V41067A Datasheet - Datasheet PDF 188 KB Jun 6, 2013
Application Notes & White Papers
AN-828 Termination - LVPECL - Application Note PDF 229 KB Jul 5, 2016
AN-835 Differential Input with VCMR being VIH Referenced - Application Note PDF 77 KB May 10, 2014
AN-815 Understanding Jitter Units - Application Note PDF 476 KB Apr 23, 2014
AN-844 Termination - AC Coupling Clock Receivers - Application Note PDF 82 KB May 12, 2014
AN-843 PCI Express Reference Clock Requirements - Application Note PDF 1.81 MB May 12, 2014
AN-842 Thermal Considerations in Package Design and Selection - Application Note PDF 403 KB May 11, 2014
AN-840 Jitter Specifications for Timing Signals - Application Note PDF 349 KB May 7, 2014
AN-836 Differential Input to Accept Single-ended Levels - Application Note PDF 37 KB May 5, 2014
AN-834 Hot-Swap Recommendations - Application Note PDF 67 KB May 5, 2014
AN-827 Application Relevance of Clock Jitter - Application Note PDF 1.06 MB Apr 23, 2014
AN-805 Recommended Ferrite Beads - Application Note PDF 38 KB Jan 14, 2014
PCNs & PDNs
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly - Product Change Notice PDF 611 KB Apr 13, 2016
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly - Product Change Notice PDF 611 KB Feb 14, 2016
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location - Product Change Notice PDF 596 KB Jan 27, 2016
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location - Product Change Notice PDF 544 KB Nov 12, 2015
PCN# : TB1503-01R1 Carrier Tape Standardization for Selective Packages - Product Change Notice PDF 333 KB Oct 21, 2015
PCN# : TB1503-01 Carrier Tape Standardization for Selective Packages - Product Change Notice PDF 291 KB Jul 20, 2015
Other
IDT PCI Express Solutions Overview 日本語, 简体中文 Overview PDF 768 KB Apr 19, 2017
The IDT Communications Products Advantage - Overview PDF 2.54 MB Feb 13, 2017
The IDT Consumer Products Advantage - Overview PDF 6.67 MB Jan 27, 2017
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
The IDT Automotive Advantage - Overview PDF 5.67 MB Jan 18, 2017
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 24, 2016

Software & Tools

Title Other Languages Type Format File Size Date
5V41067A IBIS Model - Model - IBIS ZIP 6 KB Mar 7, 2013