8-output 3.3V PCIe Zero-Delay Buffer
The 9DBL08 devices are 3.3V members of IDT’s Full-Featured PCIe family. The 9DBL08 supports PCIe Gen1-4 Common Clocked (CC) and PCIe Separate Reference Independent Spread (SRIS) systems. It offers a choice of integrated output terminations providing direct connection to 85Ω or 100Ω transmission lines. The 9DBL08P1 can be factory programmed with a user-defined power up default SMBus configuration.
For information regarding evaluation boards and material, please contact your local IDT sales representative.
- PCIe Gen1-2-3-4 CC compliant in ZDB mode
- PCIe Gen2 SRIS compliant in ZDB mode
- Supports PCIe Gen2-3 SRIS in fan-out mode
- Supports PCIe SRnS clocking in ZDB or fan-out mode
- Direct connection to 100Ω (xx42) or 85Ω (xx52) transmission lines; saves 32 resistors compared to standard PCIe devices
- Spread Spectrum tolerant; allows reduction of EMI
- Pin/SMBus selectable selectable PLL bandwidth and PLL Bypass; minimize phase jitter for each application
- Device contains default configuration; SMBus interface not required for device operation.
- Easy AC-coupling to other logic families, see IDT application note AN-891.
- Space saving 48-pin 6x6mm VFQFPN; minimal board space
|App Jitter Compliance||Input Freq (MHz)||Inputs (#)||Input Type||Output Freq Range (MHz)||Outputs (#)||Output Type||Output Voltage (V)||Power Consumption Typ (mW)||Output Skew (ps)||Supply Voltage (V)||Spread Spectrum||Output Impedance (Ω)|
|PCIe Gen4, PCIe Gen3, PCIe Gen2, PCIe Gen1||1.000000 - 200.000000||1||HCSL||1.000000 - 200.000000||8||LP-HCSL||0.8||211||50||1.05 - 3.30, 3.30||Yes||85, 100|