Skip to main content
9DBV0841 - Block Diagram


8-output 1.8V PCIe Gen1-3 Zero Delay / Fanout Buffer with Zo=100ohms

The 9DBV0841 is a 1.8V member of IDT's full featured PCIe family.  It has integrated output terminations providing Zo=100Ω for direct connection for 100Ω transmission lines. The device has 8 output enables for clock management and 3 selectable SMBus addresses.


  • LP-HCSL outputs save 32 resistors; minimal board space and BOM cost
  • 62mW typical power consumption in PLL mode; eliminates thermal concerns
  • Spread Spectrum (SS) compatible; allows use of SS for EMI reduction
  • OE# pins: support DIF power management
  • HCSL compatible differential input: can be driven by common clock sources.
  • Programmable slew rate for each output: allows tuning for various line lengths.
  • Programmable output amplitude: allows tuning for various application environments.
  • Pin/software selectable PLL bandwidth and PLL Bypass: minimize phase jitter for each application
  • Outputs blocked until PLL is locked: clean system start-up
  • Software selectable 50 MHz or 125 MHz PLL operation: useful for Ethernet Applications
  • Configuration can be accomplished with strapping pins: SMBus interface not required for device control.
  • 3.3 V tolerant SMBus interface works with legacy controllers.
  • Space-saving 6x6 mm 48-pin VFQFPN: minimal board space
  • Selectable SMBus addresses; multiple devices can easily share an SMBus segment.

Product Specification

App Jitter ComplianceCore Voltage (V)Input Freq (MHz)Output Freq Range (MHz)Output Voltage (V)Power Consumption Typ (mW)
PCIe Gen3, PCIe Gen2, PCIe Gen11.830.000000 - 175.0000001.000000 - 200.000000, 30.000000 - 137.5000000.862

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
9DBV0841AKILFActiveNDG48P1VFQFPN48IYesTrayCheck Availability
9DBV0841AKILFTActiveNDG48P1VFQFPN48IYesReelCheck Availability
9DBV0841AKLFActiveNDG48P1VFQFPN48CYesTrayCheck Availability
9DBV0841AKLFTActiveNDG48P1VFQFPN48CYesReelCheck Availability


Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
9DBV0841 Datasheet Datasheet PDF 201 KB Apr 28, 2016
Apps Notes & White Papers
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs Application Note PDF 354 KB Dec 10, 2015
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 150 KB Apr 8, 2015
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
show all (9)
AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.81 MB May 13, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 95 KB Oct 22, 2015
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 50 KB Jul 21, 2015
PCN# : TB1311-01 New Carrier Tape on VFQFPN-28, VFQFPN-40, VFQFPN-48 Product Change Notice PDF 790 KB Apr 8, 2014
IDT PCI Express Solutions Overview 简体中文, 日本語 Overview PDF 945 KB Aug 4, 2016
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016
show all (6)
Automotive Solutions Overview 简体中文 Overview PDF 2.79 MB Mar 9, 2016
IDT Fanout Buffers Product Overview Product Brief PDF 739 KB Feb 17, 2015
High-Performance, Low-Phase Noise Clocks Buffers product brief Product Brief PDF 378 KB Aug 14, 2012

Software & Tools

Title Type Format File Size Datesort icon
9DBV0841 IBIS Model Model - IBIS ZIP 70 KB Dec 2, 2015

Related Videos

  • 2016-09-23 PCI Express (PCIe) Clock Overview by IDT
  • 2015-10-19 PCIe Clocking Architectures
  • 2015-10-19 PCIe Common Clock Architecture and its...
  • 2015-10-19 PCIe Separate Reference without Spread Clock...
  • 2015-10-19 PCIe Separate Reference Clock With...
  • 2016-06-29 IDT Timing Solutions for NXP QorIQ /...
  • 2016-06-29 Overview of Timing Requirements for NXP...
  • 2016-06-29 Standard HCSL vs. Low-Power HCSL (LP-HCSL)...
  • 2016-06-29 Choosing the PLL Bandwidth for Zero Delay...
  • 2016-09-23 PCI Express (PCIe) Clock Zero-Delay and...
  • 2016-09-23 PCI Express (PCIe) Clock Applications...