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9DMU0131 Block Diagram
9DMU0131 Pinout Diagram

9DMU0131

2:1 1.5 V PCIe Gen1-2-3 Clock Mux

The 9DMU0131 is a member of IDT’s SOC-Friendly 1.5 V Ultra-Low-Power (ULP) PCIe Gen1-2-3 family. The output has an OE# pin for optimal system control and power management. The part provides asynchronous or glitch-free switching modes.

Features

  • LP-HCSL output; saves 2 resistors compared to standard HCSL output
  • 1.5 V operation; 11 mW typical power consumption
  • Selectable asynchronous or glitch-free switching; allows the mux to be selected at power up even if both inputs are not running, then transition to glitch-free switching mode
  • Spread Spectrum Compatible; supports EMI reduction
  • OE# pin; supports DIF power management
  • HCSL differential inputs; can be driven by common clock sources
  • 1 MHz to 167 MHz operating frequency
  • Space-saving 3x3 mm 16-pin VFQFPN; minimal board space

Product Specification

App Jitter CompliancePLLDiff. OutputsDiff. Output SignalingOutput Banks (#)Diff. InputsDiff. Input SignalingPower Consumption Typ (mW)Supply Voltage (V)
PCIe Gen2, PCIe Gen3, PCIe Gen1No1LP-HCSL12HCSL111.50

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
9DMU0131AKILFActiveNLG16VFQFPN16IYesTubeCheck Availability
9DMU0131AKILFTActiveNLG16VFQFPN16IYesReelCheck Availability

Documents

Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
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9DMU0131 Datasheet Datasheet PDF 109 KB Oct 29, 2015
Apps Notes & White Papers
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AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs Application Note PDF 354 KB Dec 10, 2015
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AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 150 KB Apr 8, 2015
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AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.81 MB May 13, 2014
show all (9)
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AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
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AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
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AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
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AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
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AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
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AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
PCNs & PDNs
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PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB Jan 28, 2016
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PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB Nov 13, 2015
Other
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IDT PCI Express Solutions Overview 简体中文, 日本語 Overview PDF 945 KB Aug 4, 2016
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IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
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IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016
show all (5)
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IDT Fanout Buffers Product Overview Product Brief PDF 739 KB Feb 17, 2015
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High-Performance, Low-Phase Noise Clocks Buffers product brief Product Brief PDF 378 KB Aug 14, 2012

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