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8V41S104I - Block Diagram
8V41S104I - Pinout


Crystal-to-HCSL 100MHz PCI Express® Clock Synthesizer

The IDT8V41S104I is a PLL-based clock generator specifically designed for PCI Express®™ Generation 3 applications. This device generates a 100MHz differential HCSL clock from an input reference of 25MHz. The input reference may be derived from an external source or by the addition of a 25MHz crystal to the on-chip crystal oscillator. The device offers spread spectrum clock output for reduced EMI applications. The spread spectrum control pins are used to enable or disable spread spectrum operation, as well as selecting either a down spread value of -0.35% or -0.5%. The enable and disable for each of the outputs is controlled via individual output enable pins. The IDT8V41S104I is packaged in a compact, lead-free (RoHS 6) 32-lead VFQFN package. The industrial temperature range supports high end computing, telecommunication and networking end equipment requirements.


  • Four 0.7V current mode differential HCSL output pairs
  • One 0.7V current mode differential HCSL reference output
  • CLK, nCLK input can accept the following input levels: HCSL, LVDS, LVPECLLVHSTL
  • Crystal oscillator interface: 25MHz
  • Output frequency: 100MHz
  • RMS phase jitter @ 100MHz (12kHz – 20MHz): 1.2ps (typical)
  • Spread Spectrum for electromagnetic interference (EMI) reduction
  • Individual output control via output enable pins
  • In bypass mode functions as a 1 to 5 fanout buffer
  • PCI Express® (2.5 Gb/S), Gen 2 (5 Gb/s) and Gen 3 (8 Gb/s) jitter compliant
  • 3.3V operating supply mode
  • -40°C to 85°C ambient operating temperature
  • Available lead-free (RoHS 6) package

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Voltage (V)
5HCSL25.000000, 100.00000025.0000002HCSL, HSTL, LVDS, LVPECL, Crystal3.33.3

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
8V41S104NLGIActiveNLG32P3VFQFPN32IYesTrayCheck Availability
8V41S104NLGI8ActiveNLG32P3VFQFPN32IYesReelCheck Availability


Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
8V41S104I Datasheet Datasheet PDF 423 KB May 6, 2014
Apps Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.81 MB May 13, 2014
show all (14)
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 32 KB May 7, 2014
AN-839 RMS Phase Jitter Application Note PDF 149 KB May 7, 2014
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB May 6, 2014
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB May 6, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 52 KB Mar 12, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
AN-808 PCI Express/HCSL Termination Application Note PDF 54 KB Jan 15, 2014
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB Jan 28, 2016
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB Nov 13, 2015
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016

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