Skip to main content
932SQ425 - Block Diagram
932SQ425 - Pinout

932SQ425

CK420BQ Derivative Synthesizer

The 932SQ425 is a reduced-pin-count main clock synthesizer for Intel Romley-generation server platforms. The 932SQ425 is driven with a 25 MHz crystal for maximum performance. It generates CPU outputs of 100 or 133.33 MHz.

Features

  • 3 - HCSL CPU outputs
  • 3 - HCSL Non-Spread SAS/SRC outputs
  • 2 - HCSL SRC outputs
  • 1 - HCSL DOT96 output
  • 1 - 3.3V 48M outpu
  • 3 - 3.3V PCI outputs
  • 1 - 3.3V 14.318M output
  • 0.5% down spread capable on CPU/SRC/PCI outputs
  • Lower EMI
  • 56-pin MLF package
  • 21% space savings compared to 932SQ420 64-pin MLF
  • Cycle to cycle jitter: CPU/SRC/NS_SRC/NS_SAS <50ps
  • Phase jitter: PCIe Gen2 <3ps rms
  • Phase jitter: PCIe Gen3
  • Phase jitter: QPI 9.6GB/s <0.2ps rms
  • Phase jitter: NS-SAS <0.4ps rms using raw phase data
  • Phase jitter: NS-SAS <1.3ps rms using Clk Jit Tool 1.6.3

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Output Banks (#)Core Voltage (V)Output Voltage (V)Chipset ManufacturerChipset Name
LVTTL, HCSLIntelPatsburg, Wellsburg, Lewisburg, C600

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
932SQ425AKLFActiveNLG56P3VFQFPN56CYesTrayCheck Availability
932SQ425AKLFTActiveNLG56P3VFQFPN56CYesReelCheck Availability

Documents

Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
no-lock
932SQ425 Datasheet Datasheet PDF 267 KB Apr 23, 2012
Apps Notes & White Papers
no-lock
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
no-lock
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
no-lock
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
show all (10)
no-lock
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
no-lock
AN-839 RMS Phase Jitter Application Note PDF 149 KB May 7, 2014
no-lock
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 32 KB May 7, 2014
no-lock
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
no-lock
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
no-lock
AN-808 PCI Express/HCSL Termination Application Note PDF 54 KB Jan 15, 2014
no-lock
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
PCNs & PDNs
no-lock
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 95 KB Oct 22, 2015
no-lock
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 50 KB Jul 21, 2015
no-lock
PCN#: A1309-03 Additional Assembly Sources Product Change Notice PDF 398 KB Oct 21, 2013
show all (4)
no-lock
PCN# : A1305-01 Gold Wire to Copper Wire Product Change Notice PDF 148 KB Jul 29, 2013
Other
no-lock
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
no-lock
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016
no-lock
932SQ425 Block Diagram Block Diagram PNG 27 KB Feb 7, 2012