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MK5818 - Block Diagram
MK5818 - Pinout


Spread Spectrum Clock Generator

The MK5818 generates a low EMI output clock and a reference clock from a clock or crystal input. The part is designed to lower EMI through the application of spreading a clock. Using IDT’ proprietary mix of analog and digital Phase Locked Loop (PLL) technology, the device spreads the frequency spectrum of the output, reducing the frequency amplitude peaks by several dB depending on spread range. The MK5818 offers a range of down spread from a high speed clock or crystal input. The MK5818 generates one modulated (SSCLK) and unmodulated (REFCLK) clock and is compatible with Cypress CY25818. The modulated clock is controlled by the select pin, and the unmodulated clock has the same frequency as the input clock or crystal.


  • Packaged in 8-pin SOIC
  • Input frequency range 8 to 16 MHz
  • Provides modulated and unmodulated clocks
  • Accepts a clock or crystal input
  • Provides down spread modulation
  • Provides power down function
  • Reduce electromagnetic interference (EMI) by 8 to 16 db
  • Operating voltage of 3.3 V
  • Advanced, low-power CMOS process
  • Pb (lead) free package, RoHS compliant

Product Specification

Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Voltage (V)
LVCMOS16.000000 - 0.00000016.000000 - 0.0000001LVCMOS, Crystal23.33.3

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
MK5818SLFActiveDCG8SOIC8CYesTubeCheck Availability
MK5818SLFTRActiveDCG8SOIC8CYesReelCheck Availability


Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
mk5818 Datasheet PDF 181 KB May 17, 2010
Apps Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
AN-845 Termination - LVCMOS Application Note PDF 62 KB May 13, 2014
show all (12)
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 32 KB May 7, 2014
AN-839 RMS Phase Jitter Application Note PDF 149 KB May 7, 2014
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB May 6, 2014
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB May 6, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Apr 14, 2016
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Feb 15, 2016
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 95 KB Oct 22, 2015
show all (6)
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 50 KB Jul 21, 2015
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB Mar 24, 2013
PCN# : A1208-01R1 Gold to Copper Wire Product Change Notice PDF 254 KB Dec 21, 2012
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016