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851010I - Block Diagram
851010I - Pinout


1-to-10,Differential HCSL Fanout Buffer

The 851010I is a 1-to-10 Differential HCSL Fanout Buffer. The 851010I is designed to translate any differential signal levels to differential HCSL output levels. An external reference resistor is used to set the value of the current supplied to an external load. The load resistor value is chosen to equal the value of the characteristic line impedance of 50?. The 851010I is characterized at an operating supply voltage of 3.3V. The differential HCSL outputs, accurate crossover voltage and symmetric duty cycle makes the 851010I ideal for interfacing to PCI Express® and FBDIMM applications.


  • Ten differential HCSL outputs
  • Translates any differential input signal (LVPECL, LVHSTL, LVDS, HCSL) to HCSL levels without external bias networks
  • Maximum output frequency: 250MHz
  • Output skew: 165ps (maximum)
  • Output drift: 140ps (maximum)
  • VOH: 850mV (maximum)
  • Additive phase jitter, RMS: 0.19ps (typical)
  • Full 3.3V supply voltage
  • Available in lead-free (RoHS 6) package
  • -40°C to 85°C ambient operating temperature

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Voltage (V)Output Skew (ps)Additive Phase Jitter Typ RMS (ps)
10HCSL0.000000 - 250.0000000.000000 - 250.0000001LVDS, HSTL, LVPECL, HCSL13.33.31650.19

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
851010AYILFActiveDXG32PTQFP32IYesTrayCheck Availability
851010AYILFTActiveDXG32PTQFP32IYesReelCheck Availability


Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
ICS851010I Datasheet Datasheet PDF 752 KB Oct 22, 2013
Apps Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
show all (11)
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 6, 2014
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 94 KB May 6, 2014
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB May 6, 2014
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB May 6, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
PCN# : A1402-02 Alternate Assembly Locations Product Change Notice PDF 34 KB Sep 28, 2014
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016