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852911I - Block Diagram
852911I - Pinout

852911I

Low Skew,1-to-9 Differential-to-HSTL Fanout Buffer

The 852911I is a low skew, 1-to-9 Differential-to-HSTL Fanout Buffer. The 852911I has two selectable clock inputs which can accept most differential input levels.

Guaranteed output skew, part-to-part skew and crossover voltage characteristics make the 852911I ideal for today’s most advanced applications, such as IA64 and static RAMs.

Features

  • 9 HSTL outputs
  • Selectable differential CLK, nCLK or LVPECL clock inputs
  • HSTL_CLK, nHSTL_CLK pair can accept the following differential input levels:
    LVPECL, LVDS, HSTL, SSTLHCSL
  • PECL_CLK, nPECL_CLK supports the following input types:
    LVPECL, CMLSSTL
  • Maximum output frequency: 500MHz
  • Output skew: 100ps (maximum)
  • Part-to-part skew: 300ps (maximum)
  • Propagation delay: 1.7ns (maximum)
  • VOH = 1.4V (maximum)
  • 3.3V core, 1.6V to 3.6V output supply range
  • -40°C to 85°C ambient operating temperature​

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Skew (ps)
9HSTL0.000000 - 500.0000002LVDS, SSTL, CML, HCSL, HSTL, LVPECL13.3100

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
852911AVILFActivePLG28PLCC28IYesTubeCheck Availability
852911AVILFTActivePLG28PLCC28IYesReelCheck Availability

Documents

Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
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852911i Datasheet Datasheet PDF 162 KB Jan 21, 2016
Apps Notes & White Papers
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AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
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AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
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AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
show all (11)
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AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
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AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 6, 2014
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AN-833 Differential Input Self Oscillation Prevention Application Note PDF 94 KB May 6, 2014
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AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB May 6, 2014
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AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB May 6, 2014
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AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
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AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
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AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
Other
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IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
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IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016

Software & Tools

Title Type Format File Size Datesort icon
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852911i IBIS Model Model - IBIS ZIP 43 KB Nov 21, 2009