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8530F-01 - Block Diagram
8530F-01 - Pinout


Low Skew,1-to-16,Differential-to-3.3V LVPECL Fanout Buffer

The 8530F-01 is a low skew, 1-to-16 Differential-to-3.3V LVPECL Fanout Buffer. The CLK, nCLK pair can accept most standard differential input levels. The high gain differential amplifier accepts peak-to-peak input voltages as small as 150mV as long as the common mode voltage is within the specified minimum and maximum range. Guaranteed output and part-to-part skew characteristics make the 8530F-01 ideal for those clock distribution applications demanding well defined performance and repeatability.


  • Sixteen differential LVPECL output pairs
  • CLK, nCLK input pair
  • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSLSSTL
  • Maximum output frequency: 500MHz
  • Translates any single-ended input signal to 3.3V LVPECL levels with a resistor bias on nCLK input
  • Output skew: 20ps (typical)
  • Additive phase jitter, RMS @ 106.25MHz: 0.11ps (typical)
  • Full 3.3V supply voltage
  • 0°C to 70°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Voltage (V)Divider ValueOutput Skew (ps)Additive Phase Jitter Typ RMS (ps)
16LVPECL0.000000 - 500.0000000.000000 - 500.0000001HSTL, LVDS, LVPECL, SSTL, HCSL13.33.3750.03

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
8530FY-01LFActivePRG48TQFP48CYesTrayCheck Availability
8530FY-01LFTActivePRG48TQFP48CYesReelCheck Availability


Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
8530-01 Data Sheet Datasheet PDF 144 KB Apr 26, 2013
Apps Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
show all (7)
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 6, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016