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8INT31H800A

8-Output Very Low Phase Jitter HCSL Fanout Buffer

The 8INT31H800A is an 8-output very high performance HCSL fanout buffer for High Performance Interconnect applications. It can also be used at speeds up to 350MHz. There are four OE pins on the device, each controlling two outputs.

Features

  • Extremely low additive phase jitter; supports DB800H
    requirements
  • 3.3V operation; standard industry power supply
  • Four OE pins each controlling two outputs; easy control of clocks
    to CPU sockets
  • Universal differential input; can be driven by HCSL or LVPECL
    clock sources
  • 1MHz to 350MHz operating frequency; covers all popular Ethernet
    frequencies
  • Space saving 32-pin 5x5mm VFQFN; minimal board space

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Voltage (V)Divider ValueOutput Skew (ps)Additive Phase Jitter Typ RMS (ps)
8HCSL1.000000 - 350.0000001.000000 - 350.0000001LVDS, LVPECL, HCSL43.33.3380.065

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
8INT31H800ANLGIActiveNLG32P3VFQFPN32IYesTrayCheck Availability
8INT31H800ANLGI8ActiveNLG32P3VFQFPN32IYesReelCheck Availability

Documents

Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
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8INT31H800A Data Sheet Datasheet PDF 351 KB Dec 17, 2014
Apps Notes & White Papers
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AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
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AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
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AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.81 MB May 13, 2014
show all (12)
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AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
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AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
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AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB May 6, 2014
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AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB May 6, 2014
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AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 6, 2014
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AN-833 Differential Input Self Oscillation Prevention Application Note PDF 94 KB May 6, 2014
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AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
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AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
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AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
PCNs & PDNs
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PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB Jan 28, 2016
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PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB Nov 13, 2015
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PCN# : A1402-02 Alternate Assembly Locations Product Change Notice PDF 34 KB Sep 28, 2014
show all (4)
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PCN# : TB1405-01 New Carrier Tape and Quantity per Reel Product Change Notice PDF 788 KB Jul 7, 2014
Other
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IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
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IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016
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IDT Fanout Buffers Product Overview Product Brief PDF 739 KB Feb 17, 2015
show all (4)
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High-Performance, Low-Phase Noise Clocks Buffers product brief Product Brief PDF 378 KB Aug 14, 2012