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Clock Fanout Buffer/Frequency Divider

The 8V74S4622 is a versatile Clock Fanout Buffer/Frequency Divider. The device supports the selection, division and distribution of high-frequency clock signals with very low additive phase noise. The 8V74S4622 uses SiGe technology for an optimum of high clock frequency and low phase noise performance, combined with high power supply noise rejection and internal isolation.
Two selectable inputs are supported for differential and single ended clocks. Each of the two outputs can select a copy or a frequencydivided input signal. The available frequency divisions are divide-by-2, 4, 5 and 8. Both outputs support LVDS interfaces. For each of the two outputs, a synchronous output enabled control is implemented for stopping the output clock synchronously to the input clock signal. All device configurations are through a logic pin
interface. The device is packaged in a lead-free (RoHS 6) 20-lead VFQFN package. The extended temperature range supports wireless infrastructure, telecommunication and networking end equipment requirements. The device is a member of the high-performance clock family from IDT.


  • Clock signal selection, frequency-division and distribution
  • Two outputs individually select:
  • The input signal ÷2, ÷4, ÷5 and ÷8 or
    The input signal without frequency division (input signal is passed through)
    Two inputs to support single-ended and differential operation
  • Differential input supports LVDS and LVPECL signals
  • Single-ended input supports LVCMOS signals
  • Two differential LVDS outputs
  • Maximum Input Frequency (differential input clock): 2000MHz
  • Maximum Output Frequency: 2000MHz
  • Output skew: 22ps (maximum)
  • Additive phase noise RMS, 12kHz - 20MHz integration range: 14fs (typical)
  • LVDS output rise/fall time: 260ps (maximum)
  • 3.3V core and output supply voltages
  • -40°C to 85°C ambient operating temperature
  • Lead-free (RoHS 6) 4x4 mm2 20-lead VFQFN packaging

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Voltage (V)Divider ValueOutput Skew (ps)Additive Phase Jitter Typ RMS (ps)
2LVDS0.000000 - 250.000000, 0.000000 - 2000.000000, 0.000000 - 400.000000, 0.000000 - 500.000000, 0.000000 - 1000.0000000.000000 - 2000.0000002LVCMOS, LVPECL, LVDS23.33.31, 2, 4, 5, 822114

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
8V74S4622NLGIActiveNLG20VFQFPN20IYesTubeCheck Availability
8V74S4622NLGI/WActiveNLG20VFQFPN20IYesReelCheck Availability
8V74S4622NLGI8ActiveNLG20VFQFPN20IYesReelCheck Availability


Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
8V74S4622 Datasheet Datasheet PDF 387 KB May 14, 2015
Apps Notes & White Papers
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
show all (6)
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016