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8725B-21 - Block Diagram
8725B-21 - Pin Assignment

8725B-21

Differential to HSTL Zero Delay Buffer Clock Generator

The 8725B-21 is a highly versatile 1:1 Differential-to-HSTL Clock Generator. The CLK, nCLK pair can accept most standard differential input levels. The 8725B-21 has a fully integrated PLL and can be configured as zero delay buffer, multiplier or divider, and has an output frequency range of 31.25MHz to 630MHz. The reference divider, feedback divider and output divider are each programmable, thereby allowing for the following output-to-input frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8. The external feedback allows the device to achieve “zero delay” between the input clock and the output clocks. The PLL_SEL pin can be used to bypass the PLL for system test and debug purposes. In bypass mode, the reference clock is routed around the PLL and into the internal output dividers.

Features

  • One differential HSTL output pair
    One differential feedback output pair
  • Differential CLK, nCLK input pair
  • CLK, nCLK pair can accept the following differential
    input levels: LVPECL, LVDS, HSTL, HCSLSSTL
  • Output frequency range: 31.25MHz to 630MHz
  • Input frequency range: 31.25MHz to 630MHz
  • VCO range: 250MHz to 630MHz
  • External feedback for “zero delay” clock regeneration
    with configurable frequencies
  • Programmable dividers allow for the following output-to-input
    frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8
  • Cycle-to-cycle jitter: 50ps (maximum)
  • Output skew: 50ps (maximum)
  • Static phase offset: 200ps (maximum)
  • 3.3V core, 1.8V output operating supply
  • 0°C to 70°C ambient operating temperature

Product Specification

Core Voltage (V)Input Freq (MHz)Inputs (#)Input TypeOutput Voltage (V)Output Freq Range (MHz)Output TypeOutputs (#)C-C Jitter Max P-P (ps)
3.331.250000 - 630.0000001LVDS, HSTL, HCSL, SSTL, LVPECL1.831.250000 - 630.000000HSTL250

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
8725BM-21LFActivePSG20SOIC20CYesTubeCheck Availability
8725BM-21LFTActivePSG20SOIC20CYesReelCheck Availability

Documents

Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
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8725B-21 Final Data Sheet Datasheet PDF 336 KB Dec 18, 2015
Apps Notes & White Papers
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AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
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AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
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AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
show all (11)
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AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
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AN-833 Differential Input Self Oscillation Prevention Application Note PDF 94 KB May 6, 2014
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AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB May 6, 2014
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AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB May 6, 2014
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AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 6, 2014
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AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
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AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
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AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
PCNs & PDNs
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PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Apr 14, 2016
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PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Feb 15, 2016
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PCN#: N1512-01 Die revision change, 8725AM-21LF(T) Product Change Notice PDF 541 KB Jan 8, 2016
show all (5)
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PCN# : A1309-01 Changed of Traceability Mark Format Product Change Notice PDF 439 KB Oct 11, 2013
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PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB Mar 24, 2013
Other
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IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
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IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016

Software & Tools

Title Type Format File Size Datesort icon
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8725-21 IBIS Model Model - IBIS ZIP 34 KB Jan 5, 2010