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854S296I-33 - Block Diagram
854S296I-33 - Pinout


FemtoClock® LVDS Programmable Delay Line

The ICS854S296I-33 is a high performance LVDS Programmable Delay Line. The delay can vary from 2.2ns to 12.5ns in 10ps steps. The ICS854S296I-33 is characterized to operate from a 3.3V powersupply and is guaranteed over industrial temperature range. The delay of the device varies in discrete steps based on a control word. A 10-bit long control word sets the delay in 10ps increments. Also, the input pins IN and nIN default to an equivalent low state when left floating. The control register can accept CMOS or TTL level signals.


  • One LVDS level output 
  • One differential clock input pair
  • Differential input clock (IN, nIN) can accept the following signaling levels: LVPECL, LVDS, CML 
  • Maximum frequency: 1.2GHz
  • Programmable Delay Range: 2.2ns to 12.5ns in 10ps steps
  • D[9:0] can accept LVPECL, LVCMOS or LVTTL levels
  • Full 3.3V supply voltages
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

Product Specification

Inputs (#)Input TypeInput Freq (MHz)Outputs (#)Output TypeOutput Freq Range (MHz)
1LVPECL0.000000 - 1200.0000001LVDS0.000000 - 1200.000000

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
854S296DKI-33LFLast Time BuyNLG32VFQFPN32IYesTrayCheck Availability
854S296DKI-33LFTLast Time BuyNLG32VFQFPN32IYesReelCheck Availability


Technical Documentation

Title Type Format File Size Datesort icon
Datasheets & Errata
ICS854S296I-33 Datasheet Datasheet PDF 252 KB Jan 20, 2014
PDN# : CQ-16-04 QUARTER MARKET DECLINED PDN Product Discontinuation Notice PDF 560 KB Nov 3, 2016
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB Jan 28, 2016
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB Nov 13, 2015