1588 and Synchronous Ethernet (SyncE)
IDT’s DPLLs (Digital PLLs) for IEEE1588 and synchronous Ethernet are designed for synchronization over packet switched networks. For IEEE1588 applications the embedded DCOs (Digitally Controlled Oscillators) can be used as low-jitter synthesizers for IEEE1588 clock recovery algorithms. For synchronous Ethernet applications the DPLLs comply with ITU-T recommendations for EECs (synchronous Ethernet Equipment Clocks); these devices also comply with SONET/SDH, PDH and TDM synchronization requirements. IDT’s DPLLs can be switched between IEEE1588 DCO and SyncE modes; and they provide capabilities such as selectable loop filters, holdover, hitless reference switching, phase slope limiting and clock redundancy.
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Parametric Search
| Part Number | Outputs (#) | Output Type | Output Freq Range (MHz) | Input Freq (MHz) | Inputs (#) | Input Signal | Output Banks (#) | Core Voltage (V) | Output Voltage (V) | Output Skew (ps) | Phase Noise Typ RMS (ps) | Phase Noise Max RMS (ps) | App Jitter Compliance | Prog. Clock | Prog. Interface | Reference Output |
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