9DBV0231
2-Output Very Low Power PCIe Gen1-2-3 Buffer
The 9DBV0231 is a 2-output very low power buffer for 100MHz PCIe Gen1, Gen2 and Gen3 applications. It can also be used for 50M or 125M Ethernet Applications via software frequency selection. The device has 2 output enables for clock management.
Features
- 1.8V operation: minimal power consumption
- OE# pins: support DIF power management
- HCSL compatible differential input: can be driven by common clock sources.
- LP-HCSL differential clock outputs: reduced power and board space
- Programmable Slew rate for each output: allows tuning for various line lengths.
- Programmable output amplitude: allows tuning for various application environments.
- Pin/software selectable PLL bandwidth and PLL Bypass: minimize phase jitter for each application
- Outputs blocked until PLL is locked: clean system start-up
- Software selectable 50MHz or 125MHz PLL operation: useful for Ethernet Applications
- Configuration can be accomplished with strapping pins: SMBus interface not required for device control.
- 3.3V tolerant SMBus interface works with legacy controllers.
- Space saving 24-pin 4x4mm MLF: minimal board space
