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527-03 - Block Diagram
527-03 - Pinout


Clock Slicer User Configurable PECL Output ZDB

The 527-03 is the most flexible way to generate an output clock from an input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer multiplications and divisions. Using Phase-Locked Loop (PLL) techniques, the device accepts an input clock up to 200 MHz and produces an output clock up to 160 MHz. The 527-03 aligns rising edges on CLKIN with FBPECL at a ratio determined by the reference and feedback dividers. For a PECL input and output clock with zero delay, use the 527-04.


  • Packaged as 28 pin SSOP, Pb free (150 mil body)
  • Synchronizes fractional clocks rising edges
  • CMOS in to PECL out
  • Pin selectable dividers
  • Zero input to output skew
  • User determines the output frequency - no software needed
  • Slices frequency or period
  • Input clock frequency of 1.5 MHz to 200 MHz
  • Output clock frequencies from 2.5 MHz to 160 MHz
  • Very low jitter
  • Duty cycle of 45/55
  • Operating voltage of 3.3 V
  • Advanced, low power CMOS process

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Voltage (V)
1LVPECL2.500000 - 160.0000001.500000 - 200.0000001LVCMOS13.33.3

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
527R-03LFObsoletePCG28QSOP28CYesTubeCheck Availability
527R-03LFTObsoletePCG28QSOP28CYesReelCheck Availability


Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Datasheets & Errata
527-03 Datasheet Datasheet PDF 204 KB May 14, 2010
Apps Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
show all (10)
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 6, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
System Applications and Design Guidelines with IDT’s Zero-Delay Buffers Application Note PDF 245 KB Sep 11, 2013
527-03 / -04 Demo Board Instructions Application Note PDF 1 KB Mar 9, 2006
PDN# : U-12-03R4 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 72 KB Jun 20, 2013
PDN# : U-12-03R3 Product Discontinuation Notice PDF 72 KB Mar 31, 2013
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB Mar 24, 2013
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016