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LVCMOS Zero Delay Buffer

Alternative Products
NOTICE - The following device(s) are recommended alternatives:
Functionally compatible

The 5V2528 is a high performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver. It uses a PLL to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal. The 5V2528 inputs, PLL core, Y0, Y1, and FBOUT buffers operate from the 3.3V VDD and AVDD power supply pins. One bank of ten outputs provide low-skew, low-jitter copies of CLK. Of the ten outputs, up to seven may be configured for 2.5V or 3.3V LVTTL outputs. The number of 2.5V outputs is controlled by 3-level input signals G_Ctrl and T_Ctrl, and by connecting the appropriate VDDQ pins to 2.5V or 3.3V. The 3-level input signals may be hard-wired to high-mid-low levels. Output signal duty cycles are adjusted to 50 percent, independent of the duty cycle at CLK. The outputs can be enabled or disabled via the G_Ctrl input. When the G_Ctrl input is mid or high, the outputs switch in phase and frequency with CLK; when the G_Ctrl is low, all outputs (except FBOUT) are disabled to the logic-low state. Unlike many products containing PLLs, the 5V2528 does not require external RC networks. The loop filter for the PLL is included on-chip, minimizing component count, board space, and cost. Because it is based on PLL circuitry, the 5V2528 requires a stabilization time to achieve phase lock of the feedback signal to the reference signal. This stabilization time is required, following power up and application of a fixed-frequency, fixed-phase signal at CLK, as well as following any changes to the PLL reference or feedback signals. The PLL can be bypassed for test purposes by strapping AVDD to ground.


  • Operates at 3.3V VDD/AVDD and 2.5V/3.3V VDDQ
  • 1:10 fanout
  • 3-level inputs for output control
  • External feedback (FBIN) pin is used to synchronize the
  • outputs to the clock input signal
  • No external RC network required for PLL loop stability
  • Configurable 2.5V or 3.3V LVTTL outputs
  • tPD Phase Error at 100MHz to 166MHz: ±150ps
  • Jitter (peak-to-peak) at 133MHz and 166MHz: ±75ps
  • Spread spectrum compatible
  • Operating Frequency:
  • Std: 25MHz to 140MHz
  • A: 25MHz to 167MHz

Product Specification

Core Voltage (V)Input Freq (MHz)Inputs (#)Input TypeOutput Voltage (V)Output Freq Range (MHz)Output TypeOutputs (#)C-C Jitter Max P-P (ps)
3.325.000000 - 140.000000, 25.000000 - 167.0000001LVTTL, LVCMOS2.5, 3.325.000000 - 140.000000, 25.000000 - 167.000000LVTTL, LVCMOS1075

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
5V2528APGGIObsoletePGG28TSSOP28IYesTubeCheck Availability
5V2528APGGI8ObsoletePGG28TSSOP28IYesReelCheck Availability
5V2528PGGIObsoletePGG28TSSOP28IYesTubeCheck Availability
5V2528PGGI8ObsoletePGG28TSSOP28IYesReelCheck Availability


Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Apps Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-845 Termination - LVCMOS Application Note PDF 62 KB May 13, 2014
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
show all (11)
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB May 6, 2014
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB May 6, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 6, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
PDN# : CQ-13-02 (R1) PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 601 KB Dec 22, 2013
PDN# : CQ-13-02 Q2FY14 Quarter PDN for Manufacturing Discontinuance Product Discontinuation Notice PDF 327 KB Oct 27, 2013
PCN#: A-0410-02, Change IDT marking logo with new IDT gridless w Product Change Notice PDF 24 KB Nov 14, 2012
show all (8)
PCN# : A-0605-05 AIT as Alternate Assembly Facility for SOIC/QSOP/SSOP/TSSOP/PDIP Product Change Notice PDF 298 KB May 25, 2006
PCN#: A-0412-04 - To comply with Pb-free labels - Green Products Product Change Notice PDF 80 KB Dec 14, 2004
PCN # A-0406-07Rev.1, Qualify OSE-Taiwan for SSOP & TSSOP Product Change Notice PDF 21 KB Oct 22, 2004
PCN#: A-0310-01, Green Products Product Change Notice PDF 26 KB Oct 10, 2003
PCN#: G-0303-04, new m/c G700 & 8290 d/a material Product Change Notice PDF 130 KB Apr 14, 2003
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016