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813076I - Block Diagram
813076I - Pinout


Frequency Generator/Jitter Attenuation Device For Wireless Infrastructure Applications

Alternative Products
NOTICE - The following device(s) are recommended alternatives:
Functionally compatible

The 813076I is a member of the family of high performance clock solutions from IDT. The 813076I a PLL based synchronous clock solution that is optimized for wireless infrastructure equipment where frequency translation and jitter attenuation is needed.

The device contains two internal PLL stages that are cascaded in series. The first PLL stage attenuates the reference clock jitter by using an internal or external VCXO circuit. The internal VCXO requires the connection of an external inexpensive pullable crystal (XTAL) to the 813076I. This first PLL stage (VCXO PLL) uses external passive loop filter components which are used to optimize the PLL loop bandwidth and damping characteristics for the given application. The output of the first stage VCXO PLL is a stable and jitter-tolerant reference input for the second PLL stage of 30.72MHz. The second PLL stage provides frequency translation by multiplying the output of the first stage up to 614.4MHz. The low phase noise characteristics of the clock signal is maintained by the internal FemtoClock® PLL, which requires no external components or configuration. Two independently configurable frequency dividers translate the 491.52MHz or 614.4MHz internal VCO signal to the desired output frequencies. All frequency translation ratios are set by device configuration pins. Alternative to the clock frequency multiplication functionality, the 813076I can work as a VCXO. Enabling the VCXO mode allows the output frequency of 614.4MHz/N or 491.52MHz/N to be pulled by the input voltage of the VC pin.


  • Two operation modes: input frequency multiplier and VCXO
  • Nine differential LVPECL outputs, organized in three independent output banks
  • Two selectable differential input clocks can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTLHCSL
  • Maximum output frequency: 614.4MHz
  • FemtoClock VCO frequency: 491.52MHz or 614.4MHz (typical)
  • Frequency generation optimized for wireless infrastructure equipment
  • Attenuates the phase jitter of the input clock signal by using a low-cost pullable fundamental mode crystal (XTAL)
  • Multiplies the input clock frequency by 1, 4, 5, 16 or 20
  • LVCMOS/LVTTL levels for all input/output controls
  • PLL fast-lock control
  • VCXO PLL bandwidth can be optimized for jitter attenuation and reference frequency tracking using external loop filter components
  • Absolute pull range: ±50ppm
  • RMS phase jitter (12kHz - 20MHz): 0.97ps (typical)
  • Full 3.3V supply
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package
  • For other devices supporting wireless infrastructure clock frequencies, please refer to 813076I-02, 813076I-30, 813076I-31 and 814075
  • For replacement device use 8T49N286-dddNLGI

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Voltage (V)Output Skew (ps)Phase Jitter Typ RMS (ps)Phase Jitter Max RMS (ps)
9LVPECL24.576000, 30.720000, 98.304000, 122.880000, 153.600000, 491.520000, 614.40000015.360000, 30.720000, 61.4400002LVDS, HSTL, SSTL, HCSL, LVPECL33.33.32400.880

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
813076CYILFObsoleteEDG64P2TQFP64IYesTrayCheck Availability
813076CYILFTObsoleteEDG64P2TQFP64IYesReelCheck Availability


Technical Documentation

Title Type Format File Size Datesort icon
Datasheets & Errata
813076I Datasheet Datasheet PDF 255 KB Jul 29, 2016
Apps Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-831 The Crystal Load curve Application Note PDF 308 KB Sep 22, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
show all (15)
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
AN-839 RMS Phase Jitter Application Note PDF 149 KB May 7, 2014
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 32 KB May 7, 2014
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB May 6, 2014
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB May 6, 2014
AN-830 Quartz Crystal Drive Level Application Note PDF 59 KB May 5, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 52 KB Mar 12, 2014
AN-806 Power Supply Noise Rejection Application Note PDF 353 KB Jan 15, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
AN-801 Crystal-High Drive Level Application Note PDF 109 KB Jan 15, 2014
PDN# : CQ-14-07 Quarter PDN for Market Declined Product Discontinuation Notice PDF 541 KB Nov 12, 2014
PCN# : TB1405-01 New Carrier Tape and Quantity per Reel Product Change Notice PDF 788 KB Jul 7, 2014

Software & Tools

Title Type Format File Size Datesort icon
813076I IBIS Model Model - IBIS ZIP 58 KB Feb 6, 2009