Skip to main content
854S713I - Block Diagram
854S713I - Pinout


2:1 Multiplexer And 1:2 Demultiplexer With Pre-Emphasis

The 854S713I is a differential, high-speed 2:1 data/clock multiplexer and 1:2 clock/data demultiplexer in one device. The outputs support pre-emphasis in order to drive backplanes and long transmission lines while reducing inter-symbol interference effects. The pre-emphasis level is individually configurable to optimize for low bit error rate or power consumption. Pre-emphasis utilizes an increased output voltage swing for transition bits. The device is optimized for data rates up to 4.5Gbps (NRZ) and for deterministic jitter in data applications and low additive jitter in clock applications. The outputs are LVDS-compliant while the differential input is compatible with a variety of signal levels such as LVDS, LVPECL and CML. A small package (4.0mm x 4.0mm 24-lead VFQFN) supports space-efficient board designs. The 854S713I operates from a 3.3V power supply and supports the industrial temperature range of -40 to +85 deg C.


  • 2:1 differential data/clock multiplexer and 1:2 data/clock demultiplexer with a two-output fanout
  • 4.5 Gbps max. data rate (NRZ)
  • Differential LVDS outputs
  • Differential inputs supporting LVDS, LVPECL and CML levels
  • Configurable output pre-emphasis
  • Low-skew output: 25ps (maximum)
  • Low data deterministic jitter: 3ps (maximum)
  • LVCMOS interface levels for the control inputs
  • Additive phase jitter, RMS: 0.09ps (typical)
  • Full 3.3V supply voltage
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Skew (ps)Additive Phase Jitter Typ RMS (ps)
3LVDS0.000000 - 3000.0000000.000000 - 3000.0000003LVDS, LVPECL, CML33.3250.09

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
854S713AKILFObsoleteNLG24P1VFQFPN24IYesTubeCheck Availability
854S713AKILFTObsoleteNLG24P1VFQFPN24IYesReelCheck Availability


Technical Documentation

Title Other Languages Type Format File Size Datesort icon
Apps Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 13, 2014
AN-846 Termination - LVDS Application Note PDF 50 KB May 13, 2014
show all (12)
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB May 6, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 6, 2014
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB May 6, 2014
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 94 KB May 6, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB Mar 24, 2013
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 25, 2016

Software & Tools

Title Type Format File Size Datesort icon
854S713I 3.3V IBIS Model Model - IBIS ZIP 60 KB Nov 25, 2014