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m1021 - Block Diagram
m1021 - Pinout


VCSO Based Clock PLL

The M1020/21 is a VCSO (Voltage Controlled SAW Oscillator) based clock jitter attenuator PLL designed for clock jitter attenuation and frequency translation. The device is ideal for generating the transmit reference clock for optical network systems supporting up to 2.5Gb data rates. It can serve to jitter attenuate a stratum reference clock or a recovered clock in loop timing mode. The M1020/21 module includes a proprietary SAW (surface acoustic wave) delay line as part of the VCSO. This results in a high frequency, high-Q, low phase noise oscillator that assures low intrinsic output jitter.


  • Integrated SAW delay line
  • Low phase jitter of < 0.5ps rms, typical (12kHz to 20MHz)
  • Output frequencies of 62.5 to 175 MHz (Specify VCSO output frequency at time of order)
  • LVPECL clock output (CML and LVDS options available)
  • Reference clock inputs support differential LVDS, LVPECL, as well as single-ended LVCMOSLVTTL
  • Loss of Lock (LOL) output pin
  • Narrow Bandwidth control input (NBW pin)
  • Hitless Switching (HS) options with or without Phase Build-out (PBO) to enable SONET (GR-253) / SDH (G.813) MTIE and TDEV compliance during reselection
  • Pin-selectable feedback and reference divider ratios
  • Industrial temperature grade available
  • Single 3.3V power supply
  • Small 9 x 9 mm SMT (surface mount) package

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeCore Voltage (V)Phase Jitter Typ RMS (ps)
2LVPECL77.760000, 155.52000015.000000 - 700.0000002LVPECL, LVDS, LVCMOS3.30.400

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
M1021-11-155.5200ObsoleteCG36CLCC36CYesTubeCheck Availability
M1021-11-155.5200TObsoleteCG36CLCC36CYesReelCheck Availability


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