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m2006-03 - Block Diagram
m2006-03 - Pinout


CMTS Direct Conversion (Zero IF) Clock Source

The M2006-03 is a VCSO (Voltage Controlled SAW Oscillator) based clock generator PLL designed for frequency translation and jitter attenuation of a master reference clock in a cable modem termination system (CMTS). External loop filter components allow tailoring of the PLL loop response. The M2006-03 includes a phase-slope limiting feature to prevent disruptive output clock phase changes upon input reference reselection.


  • Integrated SAW (surface acoustic wave) delay line
  • VCSO center frequency of 491.52MHz
  • Jitter 9ps rms, typical, over 100Hz to 12kHz Jitter 3ps rms, typical, over 12kHz to 1GHz
  • PLL phase slope limiter circuit
  • Single-ended reference inputs support LVCMOSLVTTL
  • All output clocks are differential LVPECL compatible
  • Two downstream clocks, frequency-selectable
  • One upstream clock, frequency-selectable
  • REF_OUT always provides a 10.24MHz reference clock
  • All output rising edges aligned to within 1nsec of selected input reference rising edge (unless M2_SEL= 1)
  • Output duty cycle 47-53% worse case
  • Single 3.3V power supply
  • Small 9 x 9 mm SMT (surface mount) package

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeCore Voltage (V)Phase Jitter Typ RMS (ps)
4LVPECL10.240000, 40.960000, 81.920000, 163.840000, 245.760000, 491.5200002.048000, 4.096000, 10.240000, 20.4800002LVCMOS3.33.000

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
M2006-03-491.5200ObsoleteCG36CLCC36CYesTubeCheck Availability
M2006-03-491.5200TObsoleteCG36CLCC36CYesReelCheck Availability


Technical Documentation

Title Type Format File Size Datesort icon
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB Mar 24, 2013
PDN# : Z-13-01 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 71 KB Mar 19, 2013