3.3V Dual LVTTL/LVCMOS-to-Differential LVPECL Translator
The MC100ES60T22 is a low skew dual LVTTL/LVCMOS to differential LVPECL translator. The low voltage PECL levels, small package, and dual gate design are ideal for clock translation applications.
- 280 ps typical propagation delay
- 100 ps max output-to-output skew
- LVPECL operating range: VCC = 3.135 V to 3.8 V
- 8-lead SOIC and 8-lead TSSOP packages
- Ambient temperature range –40°C to +85°C
- 8-lead SOIC Pb-free package available