Asynchronous SRAMs

The IDT asynchronous SRAMs are fabricated using high-performance, high-reliability CMOS technology. This technology, combined with innovative circuit design techniques, provides a cost-effective solution for high speed async SRAM memory needs. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation. IDT offers asynchronous SRAM in RoHS 6/6-compliant (Green) packaging using industry-standard package options.

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About Asynchronous SRAM (Async SRAM)
Asynchronous SRAM (aka Asynchronous Static Random Access Memory) is a type of memory that stores data using a static method, in which the data remains constant as long as electric power is supplied to the device. This is different than DRAM (dynamic RAM), which constantly needs to refresh the data stored in the memory.

Because Async SRAM stores data statically, it is faster and requires less power than DRAM. On the other hand, SRAM is built using a more complex circuit topology, and is therefore less dense and more expensive to manufacture than DRAM. As a result, DRAM is most often used as the main memory for personal computers, while Asynchronous SRAM is commonly used in smaller memory applications, such as CPU cache memory, hard drive buffers, networking equipment, consumer electronics and appliances. Synchronous SRAMs use clocks for reading and writing, while asynchronous SRAMs are usually controlled by asynchronous signals.

Key parameters for choosing an asynchronous SRAM include:

  • density: this is the number of bits the Async SRAM will hold in its memory. IDT offers sizes up to 4 MB.
  • bus width: the number of “lanes” used to read and write to the memory. IDT offers both 8-bit and 16-bit options.
  • core voltage: the supply voltage used to power the Async SRAM. This is typically defined by the power rails available in the system, and often has implications on the I/O voltage required to read and write to the memory. IDT offers standard 5 V and 3.3 V options.
  • I/O voltage: the voltage used for the data input and output, for some devices this is seperate from the core voltage.
  • access time: the time it takes to read from or write to the memory. Ideally, the access time of the asynchronous SRAM should be fast enough to keep up with the CPU. If not, the CPU will waste a certain number of clock cycles, which makes it slower. IDT offers access times as fast as 10 nanoseconds.