The 71T75602 2.5V CMOS Synchronous SRAM organized as 512K x 36 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75602 contains data I/O, address and control signal registers.
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2.5V 512K X 36 ZBT Synchronous 2.5V I/O PipeLine SRAM
Software & Tools
|Title||Other Languages||Type||Format||File Size||Date|
|71T75602_PF IBIS Model||-||Model - IBIS||ZIP||14 KB||Jul 2, 2001|