The basic PLL control loop is shown in the figure below. The input reference divider is R, the feedback divider is N, the phase detector gain is KPD (mA/rad), the loop filter is Z(s) (Ohms) and the VCXO is an integrator with a gain of KVCXO (rad/V). The modulation bandwidth of the VCXO introduces another pole in the VCXO response, but this is assumed to be much higher in frequency than the closed loop response of the PLL and therefore ignored.
The phase transfer function of the PLL then is:
The frequency response of the PLL is determined by the user with the selection of N and Z(s). Several general properties are to be noted.
1. R is outside the feedback loop and does not affect the PLL frequency response. R therefore does not play a role in the loop filter design.
2. All phase variables are in units of radians and all frequencies are in units of rad/sec. Bandwidth will also be in units of rad/sec. When calculating loop filter values based on the design target bandwidth, the factor of 2π must be included to be consistent with the LaPlace variable s. KPD is in units of mA/rad and KVCXO is in units of rad/V. Since the phase detector and VCXO are cascaded in the PLL, the two terms always occur as a product. It is more intuitive to define KPD in units of mA/Hz and KVCXO in units of Hz/V since the factor of 2π cancels in the product.
3. The loop gain is:
The loop gain is composed of two parts, a constant factor and a frequency dependent factor. The constant factor contains four user selectable factors, N, the impedance level of the filter, KPD and KVCXO. KPD is set by the charge pump current and KVCXO weakly by the selection of external pullable crystal. The impedance level of the filter is set by the particular selection of external components.
4. The user selectable frequency dependent factors are composed of the capacitors and time constants in the loop filter impedance.
5. The phase transfer and the frequency translation factor of the PLL is N/R. Any common multiple of N and R will also result in the same frequency translation. Since increasing N will decrease the bandwidth of the PLL, the bandwidth of the PLL can be decreased without changing the frequency translation by increasing N and R by the same factor.
6. High values of loop gain suppress distortion and improve the low frequency input reference tracking performance of the PLL. There three ways to increase the loop gain: increase KPD (by decreasing RSET), by increasing the impedance of the loop filter (by increasing resistance and decreasing capacitance) and by selecting a crystal with greater pull range. Refer to application note AN-849 for more details. For other questions not addressed by the Knowledge Base, please submit a technical support request.


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Application Notes & White Papers
AN-849 Loop Filter Component Selection for VCXO Based PLLs Application Note PDF 218 KB