LVPECL receivers often have VBB outputs to facilitate single ended DC operation for logic. The VBB output may also be used to provide bias for both input terminals for AC coupled inputs. Figure 1 shows how the VBB terminal can be used in each of these two cases. In the case of differential drive, the Cbypass can be connected directly to VBB. Cc is set by the clock frequency in accordance with the table below and Cbypass is typically set to 10 x Cc. For single ended drive Rfilter has been added to keep potentially large switching currents from being sourced or sunk from the VBB voltage generator. Rfilter can be set for 100 ohms. There are also receivers that incorporate the differential terminations into the device with a common mode tap at a VT terminal as well as a VBB generator. Adjustments of the terminations of Figure 1 to exploit these features for single ended and differential AC coupling are shown in Figure 2. Refer to application note AN-844 for more details. For other questions not addressed by the Knowledge Base, please submit a technical support request.

 

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AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB