NOTICE - The following device(s) are recommended alternatives:

The 8624I is a high performance, 1-to-5 Differential-to-HSTL zero delay buffer. The 8624I has two selectable clock input pairs. The CLK0, nCLK0 and CLK1, nCLK1 pair can accept most standard differential input levels. The VCO operates at a frequency range of 250MHz to 630MHz. Utilizing one of the outputs as feedback to the PLL, output frequencies up to 630MHz can be regenerated with zero delay with respect to the input. Dual reference clock inputs support reduntant clock or multiple reference applications..

Features

  • Fully integrated PLL
  • Five differential HSTL compatible outputs
  • Selectable differential CLKx, nCLKx input pairs
  • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, HSTL, SSTL, HCSL
  • Output frequency range: 31.25MHz to 630MHz
  • Input frequency range: 31.25MHz to 630MHz
  • VCO range: 250MHz to 630MHz
  • External feedback for "zero delay" clock regeneration
  • Cycle-to-cycle jitter: 35ps (maximum)
  • Output skew: 50ps (maximum)
  • Static phase offset: 30ps ±125ps
  • 3.3V core, 1.8V output operating supply
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free RoHS-compliant packages
  • For replacement device use 8725BY-01LF

Product Options

Orderable Part ID Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Package Buy Sample
8624BYILF Obsolete TQFP 32 I Yes Tray Package Info
Availability
8624BYILFT Obsolete TQFP 32 I Yes Reel Package Info
Availability

Documentation & Downloads

Title Other Languages Type Format File Size Date
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 160 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 180 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PCNs & PDNs
PDN# : CQ-14-07 Quarter PDN for Market Declined Product Discontinuation Notice PDF 541 KB
PCN# : A1401-02 Alternate Copper Wire Assembly Site Product Change Notice PDF 36 KB
PCN# : TB1303-01 Change of Carrier Tape for TQFP-32, TQFP-48 Product Change Notice PDF 472 KB
Downloads
8624I IBIS Model - IBIS ZIP 41 KB
Other
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB