The 5RCD0148HC2 (RCD) is a registering clock driver used on DDR5 RDIMMs and LRDIMMs. Its primary function is to buffer the Command Address (CA) bus, chip selects, and clock between the host controller and the DRAMs. It also creates a BCOM bus to control the data buffers for LRDIMMs.

The 5RCD0148HC2 contains two separate channels with some common logic such as clocking, but otherwise operate independently of each other. Each channel has a 7-bit double data rate CA bus input, a single parity input, two chip-select inputs, produces two copies of 14-bit single data rate CA bus outputs and two copies of the chip-select outputs. The RCD has a common clock input and PLL, but produces separate clock outputs to the DRAM channels. 


  • Pinout optimized DDR5 RDIMM PCB layout
  • DDR5 server speeds up to 4800MT/s
  • Supports power-down modes to conserve server power
  • Supports 1-rank/2-rank DIMM configurations
  • Supports SDP, DDP, 3DS DRAM types
  • Supports up to 16Gb DRAM die
  • Provides access to internal control words for configuring device features and adapting to different RDIMM and system applications
  • I3C sideband access for asynchronous register access control
  • BCOM sideband bus for LRDIMM data buffer control
  • Loopback and pass-through modes


発注型名 Part Status Pkg. Type Lead Count (#) Carrier Type Temp. Grade 購入/サンプル
Preview FCCSP 240 Tray C
Preview FCCSP 240 Reel C


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5RCD0148HC2 Short-Form Datasheet ショートフォーム(簡略版) PDF 91 KB