The 82P33724 Port Synchronizer for IEEE 1588 and Synchronous Ethernet provides tools to manage timing references, clock conversion and timing paths for IEEE 1588 and Synchronous Ethernet (SyncE). The device supports up to three independent timing paths for: IEEE 1588 clock generation; SyncE clock generation; and general purpose frequency translation. The device outputs low-jitter clocks that can directly synchronize Ethernet interfaces; as well as SONET/SDH and PDH interfaces and IEEE 1588 Time Stamp Units (TSUs).

► Download the Altera and IDT Synchronous Ethernet Solution for ITU-T G.8262 white paper

特性

  • Supports 3 independent timing paths: IEEE 1588, physical layer (SyncE, SONET/SDH, PDH, CPRI/OBSAI) and recovered line clock
  • Phase synchronizes IEEE 1588 TSUs (Time Stamp Units) at network ports with redundant system-wide IEEE 1588 clock and sync pulse pairs: 1PPS (Pulse Per Second) sync pulses
  • Precise 1PPS edge alignment is supported with programmable input-to-input, input-to-output and output-to-output phase delays: sub-ns resolution
  • Frequency synchronizes physical layer ports with redundant system-wide frequency references
  • Generates clocks for: Ethernet, SONET/SDH and PDH interfaces: jitter generation <1 ps RMS (12 kHz to 20 MHz)
  • Prevents time errors and PHY bit errors with automatic reference switching, optional hitless reference switching and revertive or non-revertive reference switching
  • DPLLs lock to a wide range of reference clock frequencies including: 10/100/1000 Ethernet, 10G Ethernet, OTN, SONET/SDH, PDH, TDM, GSM, CPRI/OBSAI and GNSS frequencies using fractional-N input dividers
  • Automatically loads configuration from an external EPROM after reset without processor intervention
  • 72 pin QFN package

产品选择

下单器件 ID Part Status Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Active C 是的 Tray
Availability
Active C 是的 Reel
Availability

文档和下载

文档标题 其他语言 类型 文档格式 文件大小 日期
数据手册与勘误表
82P33724 Datasheet 数据手册 PDF 876 KB
应用指南 &白皮书
AN-807 Recommended Crystal Oscillators for Network Synchronization 应用文档 PDF 148 KB
AN-950 82P338XX/9XX Usage of a SYNC Input for Clock Alignment 应用文档 PDF 324 KB
AN-946 Using a 19.2MHz System Clock with 82P337xx/8xx/9xx 应用文档 PDF 249 KB
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
ITU-T Profiles for IEEE 1588 白皮书 PDF 1.17 MB
AN-846 Termination - LVDS 应用文档 PDF 133 KB
AN-845 Termination - LVCMOS 应用文档 PDF 146 KB
AN-844 Termination - AC Coupling Clock Receivers 应用文档 PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-838 Peak-to-Peak Jitter Calculations 应用文档 PDF 115 KB
AN-839 RMS Phase Jitter 应用文档 PDF 233 KB
AN-836 Differential Input to Accept Single-ended Levels 应用文档 PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced 应用文档 PDF 160 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-801 Crystal-High Drive Level 应用文档 PDF 202 KB
AN-806 Power Supply Noise Rejection 应用文档 PDF 438 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN / PDN
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility 产品变更通告 PDF 983 KB
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location 产品变更通告 PDF 583 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location 产品变更通告 PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location 产品变更通告 PDF 544 KB
Downloads
82P33xx4 Timing Commander Personality 软件 TCP 3.50 MB
82P33724 BSDL 模型 - BSDL BSD 15 KB
82P33724 IBIS Model 模型 - IBIS ZIP 173 KB
其他
Timing Solutions Products Overview 概览 PDF 4.11 MB
IDT Products for Wired Broadband Applications Application Briefs PDF 686 KB
TIming Fabric for Next Generation Communications Equipment Overview (Chinese) English, 日本語 概览 PDF 995 KB
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB
IDT Clock Distribution Overview 日本語 概览 PDF 3.79 MB
Timing Fabric for Communications Equipment Overview 概览 PDF 263 KB