Along with CSPUA877A or 98ULPA877A DDR2 PLL Provides a fully JEDEC compliant solution for DDR2 RDIMMs for 400, 533, 667 and 800MHz.


  • 14-bit 1:2 registered buffer with parity check functionality
  • Supports SSTL_18 JEDEC specification on data inputs and outputs
  • 50% more dynamic driver strength than standard SSTU32864
  • Supports LVCMOS switching levels on C1 and RESET# inputs
  • Low voltage operation

Product Options

下单器件 ID Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type 封装 Buy Sample
74SSTUBF32869ABKG Active CABGA 150 C 是的 Tray Package Info
74SSTUBF32869ABKG8 Active CABGA 150 C 是的 Reel Package Info

Documentation & Downloads

文档标题 他の言語 Type 文档格式 文件大小
74SSTUBF32869A Datasheet Datasheet PDF 493 KB
PCN#: A1309-03 Additional Assembly Sources Product Change Notice PDF 398 KB