NOTICE - The following device(s) are recommended alternatives:
The MC100ES6014 is a low skew 1-to-5 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The ECL/PECL input signals can be either differential or single-ended (if the VBB output is used). HSTL and LVDS inputs can be used when the ES6014 is operating under PECL conditions. The ES6014 specifically guarantees low output-to-output skew. Optimal design, layout, and processing minimize skew within a device and from device to device. To ensure that the tight skew specification is realized, both sides of any differential output need to be terminated identically into 50 ? even if only one output is being used. If an output pair is unused, both outputs may be left open (unterminated) without affecting skew. The common enable (EN) is synchronous, outputs are enabled/disabled in the LOW state. This avoids a runt clock pulse when the device is enabled/disabled as can happen with an asynchronous control. The internal flip flop is clocked on the falling edge of the input clock; therefore, all associated specification limits are referenced to the negative edge of the clock input. The MC100ES6014, as with most other ECL devices, can be operated from a positive VCC supply in PECL mode. This allows the ES6014 to be used for high performance clock distribution in +3.3 V or +2.5 V systems. Single ended CLK input pin operation is limited to a VCC ? 3.0 V in PECL mode, or VEE ? –3.0 V in ECL mode. Designers can take advantage of the ES6014's performance to distribute low skew clocks across the backplane or the board.

特性

  • 25 ps Within Device Skew
  • 400 ps Typical Propagation Delay
  • Maximum Frequency > 2 GHz Typical
  • The 100 Series Contains Temperature Compensation
  • PECL and HSTL Mode: VCC = 2.375 V to 3.8 V with VEE = 0 V
  • ECL Mode: VCC = 0 V with VEE = –2.375 V to –3.8 V
  • LVDS and HSTL Input Compatible
  • Open Input Default State
  • 20-Lead Pb-Free Package Available

产品选择

下单器件 ID Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Obsolete TSSOP 20 C 是的 Tube
Availability
Obsolete TSSOP 20 C 是的 Reel
Availability

文档和下载

文档标题 其他语言 类型 文档格式 文件大小 日期
数据手册与勘误表
MC100ES6014 Datasheet 数据手册 PDF 537 KB
应用指南 &白皮书
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
AN-844 Termination - AC Coupling Clock Receivers 应用文档 PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-833 Differential Input Self Oscillation Prevention 应用文档 PDF 180 KB
AN-834 Hot-Swap Recommendations 应用文档 PDF 153 KB
AN-836 Differential Input to Accept Single-ended Levels 应用文档 PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced 应用文档 PDF 160 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN / PDN
PDN# : N-12-22R2 PRODUCT DISCONTINUANCE NOTICE 产品停产通告 PDF 363 KB
PDN# : N-12-22R1 PRODUCT DISCONTINUANCE NOTICE 产品停产通告 PDF 209 KB
Downloads
MC100ES6014 2.5V IBIS Model 模型 - IBIS ZIP 7 KB
其他
IDT Clock Distribution Overview 日本語 概览 PDF 3.79 MB