1:1 and 1:2 Registered Buffer with 1.8V SSTL I/O

NOTICE - The following device(s) are recommended alternatives:

Along with CSPUA877A or 98ULPA877A DDR2 PLL Provides a fully JEDEC compliant solution for non parity DDR2 RDIMMs for 400 and 533MHz.  


  • 1:1 and 1:2 registered buffer
  • 1.8V Operation
  • SSTL_18 style clock and data inputs
  • Differential CLK input
  • Control inputs compatible with LVCMOS levels
  • Flow-through architecture for optimum PCB design
  • Latch-up performance exceeds 100mA
  • ESD >2000V per MIL-STD-883, Method 3015; >200V using machine model (C = 200pF, R = 0)
  • Maximum operating frequency: 340MHz

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
74SSTU32864GBFG Obsolete BFG96 CABGA 96 C Yes Tray
74SSTU32864GBFG8 Obsolete BFG96 CABGA 96 C Yes Reel

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
74SSTU32864/A/C/D/G Datasheet Datasheet PDF 177 KB Apr 23, 2007
PDN# : CQ-14-06R1 Revised Product Discontinuance Notice Product Discontinuation Notice PDF 407 KB Sep 7, 2014
PDN# : CQ-14-06 MANUFACTURING DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 192 KB Sep 3, 2014
PCN# : A-0610-02 ASAT China as Alternate Facility for CABGA/CVBGA/FPBGA/TQFP/PQFP Product Change Notice PDF 252 KB Oct 18, 2006
PCN# A-0607-05 Green Mold Compound KMC3580 for BGA Product Change Notice PDF 194 KB Aug 29, 2006
PCN#: TB-0512-01 Reel Color Changed from Blue to Black Product Change Notice PDF 729 KB Dec 15, 2005