NOTICE - The following device(s) are recommended alternatives:

The 8633-01 is a high performance 1-to-3 Differential-to-3.3V LVPECL Zero Delay Buffer. The 8633-01 has two selectable clock inputs. The CLKx, nCLKx pairs can accept most standard differential input levels. Utilizing one of the outputs as feedback to the PLL, output frequencies up to 700MHz can be regenerated with zero delay with respect to the input. Dual reference clock inputs support redundant clock or multiple reference applications.

Features

  • Three differential 3.3V LVPECL outputs
  • Selectable differential clock inputs
  • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
  • Output frequency range: 31.25MHz to 700MHz
  • Input frequency range: 31.25MHz to 700MHz
  • VCO range: 250MHz to 700MHz
  • External feedback for "zero delay" clock regeneration
  • Cycle-to-cycle jitter: 25ps (maximum)
  • Output skew: 25ps (maximum)
  • PLL reference zero delay: 50ps ± 100ps
  • 3.3V operating supply
  • 0°C to 70°C ambient operating temperature
  • Industrial temperature information available upon request
  • Available in both standard and lead-free RoHs-compliant packages

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
8633AF-01LF Obsolete PYG28 SSOP 28 C Yes Tube
Availability
8633AF-01LFT Obsolete PYG28 SSOP 28 C Yes Reel
Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 94 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
PCNs & PDNs
PDN# : CQ-14-03 Quarter PDN for Declined Market Product Discontinuation Notice PDF 539 KB
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB
Other
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB

Software & Tools

Title Other Languages Type Format File Size Date
8633-01 IBIS Model - IBIS ZIP 35 KB