1-to-6,LVPECL-to-HCSL/LVCMOS÷1,÷2,÷4 Clock Generator

The 87158 is a high performance 1-to-6 LVPECL-to- HCSL/LVCMOS ClockGenerator. The 87158 has one differential input (which can accept LVDS, LVPECL, LVHSTL, SSTL, HCSL), six differential HCSL output pairs and two complementary LVCMOS/LVTTLoutputs. The six HCSL output pairs can be individually configured for divide-by-1, 2, and 4 or high impedance by use of select pins. The two complementary LVCMOS/LVTTL outputs can be configured for divide by 2, divide by 4, high impedance, or driven low for low power operation. The primary use of the 87158 is in Intel® E8870 chipsets that use Intel® Pentium 4 processors. The 87158 converts the differential clock from the main system clock into HCSL clocks used by Intel® Pentium 4 processors. However, the 87158 is a highly flexible, general purpose device that operates up to 600MHz and can be used in any situation where Differential-to-HCSL translation is required.

Features

  • Six HCSL outputs
  • Two LVCMOS/LVTTL outputs
  • One Differential LVPECL clock input pair
  • PCLK, nPCLK supports the following input types: LVDS, LVPECL, LVHSTL, SSTL, HCSL
  • Maximum output frequency: 600MHz (maximum)
  • Output skew: 100ps (maximum)
  • Propagation delay: 4ns (maximum)
  • 3.3V operating supply
  • 0°C to 85°C ambient operating temperature
  • Available in both standard and lead-free RoHS compliant packages
  • Industrial temperature information available upon request

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
87158AFLF Obsolete PVG48 SSOP 48 C Yes Tube Availability
87158AFLFT Obsolete PVG48 SSOP 48 C Yes Reel Availability
87158AGLF Obsolete PAG48 TSSOP 48 C Yes Tube Availability
87158AGLFT Obsolete PAG48 TSSOP 48 C Yes Reel Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-845 Termination - LVCMOS Application Note PDF 62 KB May 12, 2014
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 11, 2014
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB May 10, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 7, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 5, 2014
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 94 KB May 5, 2014
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB May 5, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 23, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 23, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 14, 2014
PCNs & PDNs
PCN# : A1506-02 Gold wire to Copper wire Product Change Notice PDF 35 KB Oct 7, 2015
PCN#: A1309-03 Additional Assembly Sources Product Change Notice PDF 398 KB Oct 20, 2013
PCN# : A1309-01 Changed of Traceability Mark Format Product Change Notice PDF 439 KB Oct 10, 2013
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB Mar 23, 2013
Other
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 24, 2016

Software & Tools

Title Other Languages Type Format File Size Date
87158 IBIS Model - IBIS ZIP 171 KB Nov 19, 2009