Dual 12-bit ADC; 80 Msps

NOTICE - The following device(s) are recommended alternatives:
The ADC1213D is a dual channel 12-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power at sample rates up to 80 Msps. Pipelined architecture and output error correction ensure the ADC1213D is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a 3.3 V source for analog and a 1.8 V source for the output driver, it can output data in serial mode, because of the two lanes of differential outputs, which are compliant with the JESD204A standard.

Features

  • 2 configurable serial outputs
  • Compliant with JESD204A serial transmission standard
  • Dual channel 12-bit pipelined ADC core
  • High IF capability
  • Input bandwidth, 600 MHz
  • Power-down and Sleep modes
  • Sample rate up to 80 Msps
  • SPI interface

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
ADC1213D080HN-C1 Obsolete NLG56 VFQFPN 56 I Yes Tray Availability
ADC1213D080HN-C18 Obsolete NLG56 VFQFPN 56 I Yes Reel Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
ADC1213D SER Datasheet Datasheet PDF 589 KB Jun 15, 2012

Evaluation Boards

Part Number Title Sort ascending
ADC1213D080WO ADC1213D080WO demoboard; compliant with Lattice, Altera, Xilinx FPGA boards through
specific connectors
ADC1213D080W2 ADC1213D080W2 demo board, Lattice ECP3 on board
ADC1213D080W1 ADC1213D080W1 Demo board With FPGA