The CV145 differential buffer complies with Intel DB1900G , and is designed to work in conjunction with the main clock of CK409, CK410/CK410M and CK410B etc., PLL is off in bypass mode and no clock detect.

Features

  • Compliant with Intel DB1900G
  • DIF Clock Support  19 differential clock output pairs @ 0.7 V  150 ps skew performance across all outputs
  • OE pin Control of All Outputs
  • 3.3 V Operation
  • Gear Ratio supporting generation of clocks at a different frequency ratioed from the input.
  • Split outputs supporting options of 2 outputs @1:1 and remaining 17 pairs at an alternate gear
  • Pin level OE control of individual outputs
  • Multiple output frequency options up to 400Mhz as a gear ratio of input clocks of 100-400Mhz
  • Output is HCSL compatible
  • SMBus Programmable configurations
  • PLL Bypass Configurable
  • SMBus address configurable to allow multiple buffer control in a single control network
  • Programmable Bandwidth
  • Glitchfree transition between frequency states
  • Available in 72-pin VFQPFN package

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
CV145NLG Obsolete NLG72 VFQFPN 72 C Yes Tray
Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
CV145 Datasheet Datasheet PDF 119 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-831 The Crystal Load curve Application Note PDF 308 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB
AN-803 Crystal Timing Budget and Accuracy for IDT Timing Clock Products Application Note PDF 44 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-839 RMS Phase Jitter Application Note PDF 149 KB
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 32 KB
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB
AN-832 Timing Budget and Accuracy Application Note PDF 48 KB
AN-830 Quartz Crystal Drive Level Application Note PDF 59 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 52 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
AN-801 Crystal-High Drive Level Application Note PDF 109 KB
AN-806 Power Supply Noise Rejection Application Note PDF 353 KB
PCNs & PDNs
PCN# : A1311-03R1 Alternate Assembly Locations Product Change Notice PDF 43 KB
PCN# : A1311-03 Alternate Assembly Locations Product Change Notice PDF 140 KB
PCN# : A1308-01 Add ASEK as Alternate Assembly for VFQFPN-72 Product Change Notice PDF 103 KB