The MK1716-01 is a versatile serial programmable clock source which takes up very little board space. The device can simultaneously generate two groups of 4 output clocks and a reference clock output. Both clock groups (CLKA and CLKB) are derived from a single PLL, and have the ability to incorporate Spread Spectrum frequency modulation for reduced system EMI. Each group has control of independent PLL output divide values. Outputs may be programmed on the fly, and will lock to a new frequency in 10 ms or less. Each of the two groups are powered by a separate VDDIO voltage. The reference clock uses the fixed VDD voltage. VDDIO may vary from 2.5 V to VDD. The devices includes a OE pin which tri-states the output clocks and when tied low. IDT's VersaClockTM software allows the user to generate MK1716-01 device optimizing configuration code for target output frequencies and spread spectrum amounts.


  • Packaged in 28-pin SSOP
  • Operating voltage 3.3 V
  • Serially programmable: user determines the output frequency via a 3-wire interface
  • Highly accurate frequency generation
  • M/N Multiplier PLL: M = 1..2048, N = 1..1024
  • Eliminates the need for custom Quartz Oscillators
  • Input crystal frequency of 5-27 MHz
  • Input clock frequency of 3-50 MHz
  • Output clock frequencies of 250 kHz to 133.33 MHz
  • Spread Spectrum frequency modulation for reduced system EMI
  • Center or down spread ±0.5% min to 4% total
  • Selectable 32 kHz and 120 kHz modulation rate
  • Advanced, low power, sub-micron CMOS process
  • Separate VDD 's for each bank of 4 outputs
  • Output skew <250 ps within output bank
  • OE control on outputs

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
MK1716-01RLF Obsolete PCG28 QSOP 28 C Yes Tube
MK1716-01RLFTR Obsolete PCG28 QSOP 28 C Yes Reel

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
MK1716-01 Datasheet Datasheet PDF 217 KB May 16, 2010
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-831 The Crystal Load curve Application Note PDF 308 KB Sep 22, 2014
AN-845 Termination - LVCMOS Application Note PDF 62 KB May 12, 2014
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 11, 2014
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB May 10, 2014
AN-803 Crystal Timing Budget and Accuracy for IDT Timing Clock Products Application Note PDF 44 KB May 7, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 7, 2014
AN-839 RMS Phase Jitter Application Note PDF 149 KB May 6, 2014
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 32 KB May 6, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 5, 2014
AN-837 Overdriving the Crystal Interface Application Note PDF 50 KB May 5, 2014
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB May 5, 2014
AN-832 Timing Budget and Accuracy Application Note PDF 48 KB May 5, 2014
AN-830 Quartz Crystal Drive Level Application Note PDF 59 KB May 4, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 23, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 23, 2014
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 52 KB Mar 11, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 14, 2014
AN-801 Crystal-High Drive Level Application Note PDF 109 KB Jan 14, 2014
AN-806 Power Supply Noise Rejection Application Note PDF 353 KB Jan 14, 2014
PDN# : U-12-03R4 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 72 KB Jun 19, 2013
PDN# : U-12-03R3 Product Discontinuation Notice PDF 72 KB Mar 30, 2013

Software & Tools

Title Other Languages Type Format File Size Date
MK1716-01 3.3 V IBIS Model Model - IBIS ZIP 3 KB Mar 13, 2006