VCXO-Based Clock Translator With High Multiplication

The MK2069-03 is a VCXO (Voltage Controlled Crystal Oscillator) based clock generator that offers system synchronization, jitter attenuation and frequency translation. It can accept an input clock over a wide range of frequencies and produces a de-jittered, low phase noise clock output. The device is optimized for user configuration by providing access to all major PLL divider functions. No power-up programming is needed as configuration is pin selected. External VCXO loop filter components provide an additional level of performance tailoring. The MK2069-03 features a very wide range VCXO PLL feedback divider, allowing high frequency multiplication ratios and therefore the input of very low input reference frequencies. The lock detector (LD) output serves as a clock status monitor. The clear (CLR) input enables rapid synchronization to the phase of a newly selected input clock, while eliminating the generation of extra clock cycles and wander caused by memory in the PLL feedback divider. CLR also serves as a temporary holdover function when kept low.

Features

  • Wide range VCXO PLL feedback divider allows high frequency multiplication ratios and the input of very low input reference frequencies
  • Input clock frequency of <1kHz to 13.5MHz
  • Output clock frequency of 500kHz to 160MHz
  • PLL lock status output
  • VCXO-based clock generation offers very low jitter and phase noise generation, even with low frequency or jittery input clock.
  • PLL Clear function (CLR input) allows the VCXO to free-run, offering a short term holdover function.
  • 2nd PLL provides frequency translation of VCXO PLL to higher or alternate output frequencies.
  • Device will free-run in the absence of an input clock (or stopped input clock) based on the VCXO frequency pulled to minimum frequency limit.
  • Low power CMOS technology
  • 56 pin TSSOP package
  • Single 3.3V power supply

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
MK2069-03GI Obsolete PA56 TSSOP 56 I No Tube Availability
MK2069-03GITR Obsolete PA56 TSSOP 56 I No Reel Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
MK2069-03 Datasheet Datasheet PDF 212 KB Jun 4, 2012
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 23, 2014
AN-841 Pullable Crystal Selection and VCXO Tuning Application Note PDF 248 KB Sep 23, 2014
AN-831 The Crystal Load curve Application Note PDF 308 KB Sep 22, 2014
AN-800 Approved VCXO Crystals Application Note PDF 63 KB Jan 27, 2014
AN-849 Loop Filter Component Selection for VCXO Based PLLs Application Note PDF 132 KB May 13, 2014
AN-848 VCXO - Crystal Selection Application Note PDF 138 KB May 13, 2014
AN-847 VCXO - Absolute Pull Range Application Note PDF 70 KB May 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 11, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 7, 2014
AN-839 RMS Phase Jitter Application Note PDF 149 KB May 6, 2014
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 32 KB May 6, 2014
AN-830 Quartz Crystal Drive Level Application Note PDF 59 KB May 4, 2014
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 52 KB Mar 11, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 23, 2014
AN-806 Power Supply Noise Rejection Application Note PDF 353 KB Jan 14, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 14, 2014
AN-801 Crystal-High Drive Level Application Note PDF 109 KB Jan 14, 2014
PCNs & PDNs
PDN# : U-13-02 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 45 KB Feb 19, 2013
Other
PLL External Loop Filter Calculator Engineering ZIP 19 KB Jun 17, 2013
External Loop Filters Solver Engineering ZIP 22 KB Jun 17, 2013