Highly-Programmable Clock Generator and Jitter Attenuator IC Features sub-200fs Phase Noise to Ease Design Constraints and Lower Total System Costs
SAN JOSE, Calif., July 5, 2017 – Integrated Device Technology, Inc. (IDT) (NASDAQ: IDTI) announced today a highly-programmable clock generator and jitter attenuator IC featuring less than 200fs of phase noise, providing valuable system design margin for 10Gbps interfaces in wireline and wireless communication networks. The additional phase noise margin eases system design constraints, allowing engineers to minimize bit error rates (BER) while lowering overall system costs.
The IDT®8T49N240 is the latest member of IDT's third-generation Universal Frequency Translator (UFT™) family. It features the ability to produce virtually any common output frequency from virtually any input frequency. The highly-flexible, high-performance clock generator and jitter attenuator is ideal for 10Gbps or multi-lane 40Gpbs / 100Gbps timing applications where 300fs of phase noise is typically the maximum acceptable amount allowed at the physical ports. The 200fs phase noise specification of the 8T49N240 provides ample noise margin, enabling engineers to simplify their clock tree designs and utilize lower cost PCBs.
“The 8T49N240 was specifically designed to make our customers' jobs easier and lower their system costs,” said Kris Rausch, vice president and general manager of IDT's timing group. “The phase noise margin it provides makes it easier to achieve downstream noise targets. Couple that with its high programmability, reusability across different board designs, and the local support IDT provides across the world; and it's clear why customers keep coming back to IDT for their timing needs.”
In addition to highly trained field application engineers, IDT belongs to a select group of timing solution providers with factory application engineers resident in key regions throughout the world. This results in enhanced response times and superior support, which is often critical in meeting tight development deadlines. The 8T49N240 is complemented by IDT's proven Timing Commander™ software – a free, intuitive program that allows users to configure the device with ease by simply clicking on blocks, entering desired values, and sending the configuration to the device. IDT also offers a web-based tool that allows customers to generate custom part numbers in seconds to match their specific configurations.
The 8T49N240 features a 6 x 6 mm package footprint, requiring considerably less PCB area than most other solutions with this level of performance and flexibility. The device is also suitable for 25/28Gbps interfaces.
The 8T49N240 and evaluations boards are available now. Visit www.IDT.com/8T49N240 to learn more and request samples. For more information about IDT's industry-leading portfolio of programmable clock generators, visit the programmable clocks webpage or contact your local IDT sales representative.
Integrated Device Technology, Inc. develops system-level solutions that optimize its customers’ applications. IDT’s market-leading products in RF, high performance timing, memory interface, real-time interconnect, optical interconnect, wireless power, and SmartSensors are among the company’s broad array of complete mixed-signal solutions for the communications, computing, consumer, automotive and industrial segments. Headquartered in San Jose, Calif., IDT has design, manufacturing, sales facilities and distribution partners throughout the world. IDT stock is traded on the NASDAQ Global Select Stock Market® under the symbol “IDTI.” Additional information about IDT can be found at www.IDT.com. Follow IDT on Facebook, LinkedIn, Twitter, YouTube and Google+.
© 2017, Integrated Device Technology, Inc. IDT, the IDT logo, Timing Commander, and UFT are trademarks or registered trademarks of Integrated Device Technology, Inc., and its worldwide subsidiaries. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners.