The 9ZXL1251E is a second-generation, enhanced performance DB1200ZL differential buffer. The part is a pin-compatible upgrade to the 9ZXL1251A, while offering much improved phase jitter performance and increased system security features. A fixed external feedback maintains low drift for critical QPI/UPI applications.

特性

  • LP-HCSL outputs with 85Ω Zout; eliminate 48 resistors, save 82mm² of area
  • PCIe Gen 1–5 compliance
  • 12 OE# pins; hardware control of each output
  • 9 selectable SMBus addresses; multiple devices can share the same SMBus segment
  • Selectable PLL BW; minimizes jitter peaking in cascaded PLL topologies
  • Hardware/SMBus control of PLL bandwidth and bypass; change mode without power cycle
  • Spread spectrum compatible; tracks spreading input clock for EMI reduction
  • 100MHz and 133.33MHz PLL Mode; UPI and legacy QPI support
  • 9 x 9 mm 64-VFQFPN package; small board footprint

产品选择

下单器件 ID Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Active VFQFPN 64 I 是的 Tray
Availability
Active VFQFPN 64 I 是的 Reel
Availability

文档和下载

文档标题 其他语言 类型 文档格式 文件大小 日期
数据手册与勘误表
9ZXL04x1E-9ZXL06x1E-9ZXL08x1E-9ZXL12x1E Family Datasheet 数据手册 PDF 475 KB
应用指南 &白皮书
AN-1001 Combining PhiClock and 9ZXL1951D for PCIe Gen4/5 应用文档 PDF 244 KB
AN-975 Cascading PLLs 应用文档 PDF 255 KB
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT Universal Low-Power HCSL Outputs 应用文档 PDF 480 KB
AN-879 Low-Power HCSL vs Traditional HCSL 应用文档 PDF 235 KB
AN-844 Termination - AC Coupling Clock Receivers 应用文档 PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-808 PCI Express/HCSL Termination 应用文档 PDF 137 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN / PDN
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility 产品变更通告 PDF 983 KB
Downloads
9ZXL1251E IBIS Model 模型 - IBIS ZIP 21 KB
其他
PCI Express Timing Solutions Overview 概览 PDF 275 KB
Timing Solutions Products Overview 概览 PDF 4.11 MB
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB
IDT Clock Distribution Overview 日本語 概览 PDF 3.79 MB