The ICS85222I-02 is a 1-to-2 LVCMOS / LVTTL-to- Differential HSTL translator. The ICS85222I-02 has one single-ended clock input. The single-ended clock input accepts LVCMOS or LVTTL input levels and translates them to HSTL levels. The small outline 8-pin SOIC package makes this device ideal for applications where space, high performance and low power are important.

特性

  • Two differential HSTL outputs
  • One LVCMOS/LVTTL clock input
  • CLK input can accept the following input levels:
    LVCMOS or LVTTL
  • Maximum output frequency: 350MHz
  • Part-to-part skew: 500ps (maximum)
  • Propagation delay: 1.55ns (maximum)
  • VOH: 1.4V (maximum)
  • Output crossover voltage: 0.5V - 0.9V
  • Full 3.3V operating supply voltage
  • -40°C to 85°C ambient operating temperature
  • Lead-free RoHS compliant packaging

产品选择

下单器件 ID Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Obsolete SOIC 8 I 是的 Tube
Availability
Obsolete SOIC 8 I 是的 Reel
Availability

文档和下载

文档标题 其他语言 类型 文档格式 文件大小 日期
数据手册与勘误表
85222I-02 Datasheet 数据手册 PDF 579 KB
应用指南 &白皮书
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
AN-844 Termination - AC Coupling Clock Receivers 应用文档 PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-834 Hot-Swap Recommendations 应用文档 PDF 153 KB
AN-836 Differential Input to Accept Single-ended Levels 应用文档 PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced 应用文档 PDF 160 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN / PDN
PDN#: CQ-19-04 Product Discontinuance Notice 产品停产通告 PDF 1010 KB
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly 产品变更通告 PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly 产品变更通告 PDF 611 KB
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages 产品变更通告 PDF 95 KB
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages 产品变更通告 PDF 50 KB
PCN# : A1309-01 Changed of Traceability Mark Format 产品变更通告 PDF 439 KB
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products 产品变更通告 PDF 361 KB
其他
Timing Solutions Products Overview 概览 PDF 4.11 MB
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB
IDT Clock Distribution Overview 日本語 概览 PDF 3.79 MB
IDT Fanout Buffers Product Overview 产品简述 PDF 739 KB
High-Performance, Low-Phase Noise Clocks Buffers product brief 产品简述 PDF 378 KB