The 72T18125 is a 512K x 18 / 1M x 9 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x18/x9 data flow. Bus-Matching TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode.

Features

  • User selectable HSTL/LVTTL Input and/or Output
  • 2.5V LVTTL or 1.8V, 1.5V HSTL Port Selectable Input/Output voltage
  • 3.3V Input tolerant
  • Program programmable flags by either serial or parallel means
  • Big-Endian/Little-Endian user selectable byte representation
  • Auto power down minimizes standby power consumption
  • Master Reset clears entire FIFO
  • Partial Reset clears data, but retains programmable settings
  • Empty, Full and Half-Full flags signal FIFO status
  • Output enable puts data outputs into high impedance state
  • JTAG port, provided for Boundary Scan function
  • Available in 240-pin PBGA package
  • Easily expandable in depth and width
  • Independent Read and Write Clocks (permit reading and writing simultaneously)
  • Industrial temperature range (–40C to +85C) is available

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
72T18125L10BB Active BB240 PBGA 240 C No Tray
Availability
72T18125L4-4BB Active BB240 PBGA 240 C No Tray
Availability
72T18125L4-4BBG Active BBG240 PBGA 240 C Yes Tray
Availability
72T18125L5BB Active BB240 PBGA 240 C No Tray
Availability
72T18125L5BBGI Active BBG240 PBGA 240 I Yes Tray
Availability
72T18125L5BBI Active BB240 PBGA 240 I No Tray
Availability
72T18125L6-7BB Active BB240 PBGA 240 C No Tray
Availability

Documentation & Downloads

Title Other Languages Type Format File Size Date
Datasheets & Errata
72T1845-72T18125 Datasheet Datasheet PDF 384 KB
User Guides & Manuals
Cypress Discontinued Dual-port and FIFO to IDT Cross Reference Guide Guide PDF 123 KB
Application Notes & White Papers
AN-360V:Verilog code ex. for Xilinx ApNote XAPP628 Application Note TXT 14 KB
PCNs & PDNs
PCN# : A1504-03 Transfer Assembly Location from ATK to ATP on Select Products Product Change Notice PDF 524 KB
PCN#: A-0410-02, Change IDT marking logo with new IDT gridless w Product Change Notice PDF 24 KB
PCN# A-0605-07 Transfer 144, 240, 260, 324L PBGA from ATK to ATP Product Change Notice PDF 99 KB
PCN#: TB-0512-01 Reel Color Changed from Blue to Black Product Change Notice PDF 729 KB
PCN#: A-0412-04 - To comply with Pb-free labels - Green Products Product Change Notice PDF 80 KB
PCN#: A-0403-03, BGA package family Product Change Notice PDF 38 KB
PCN#: A-0309-05, new m/c-G770 & d/a-2300 material Product Change Notice PDF 211 KB
PCN#: A-0310-01, Green Products Product Change Notice PDF 26 KB
F0302-08: Updated Icc Spec 72T181x5/361x5/72x5 Product Change Notice PDF 24 KB
PCN# G0106-01, Moisture Sensitive Label Change Product Change Notice PDF 274 KB
Downloads
72T18125 BSDL Model - BSDL ZIP 2 KB
idt72T18125Z.ibis.4.tar Model - IBIS ZIP 30 KB

Boards & Kits